component
AD790JRZ-REEL
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Analog Devices Comparators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD790JRZ-REEL
Analog Devices · Comparators · SOIC-8
AD790JRZ-REEL from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | output | Comparator logic output swinging between VLOGIC and ground, CMOS and TTL compatible, rated for 6.4 mA source/sink. |
| 2 | VLOGIC | power_in | Logic supply for the output stage, 4.0 V to 7 V (7 V absolute maximum), typically 5 V with 0.1 µF ceramic bypass. |
| 3 | +VS | power_in | Positive analog supply, must be no lower than VLOGIC - 0.5 V; 15 V in dual-supply operation or equal to VLOGIC in single-supply operation. |
| 4 | +IN | input | Non-inverting differential input, with common-mode range from -VS to +VS-2 V. |
| 5 | -IN | input | Inverting differential input, with common-mode range from -VS to +VS-2 V. |
| 6 | -VS | power_in | Negative analog supply, must not be above ground; tied to ground in single-supply operation, -15 V in dual-supply operation. |
| 7 | LATCH | input | Active-low latch input; the output state is held while low (VIL 0.8 V max) and follows the inputs when high (VIH 1.6 V min), and it is tied to the logic supply when unused. |
| 8 | GROUND | power_in | Ground reference for the output stage, which should share a common ground lead with the supply grounds. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Amplifiers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Propagation Delay (dual supply, J grade) | tPD | 40 | 45 | ns | Dual supply; 100 mV step, 5 mV overdrive | 2 | |
| Propagation Delay TMIN to TMAX (dual supply, J grade) | tPD | 45 | ns | Dual supply; TMIN to TMAX | 2 | ||
| Output HIGH Voltage (dual supply) | VOH | 4.65 | V | Dual supply; 1.6 mA source | 2 | ||
| Output HIGH Voltage (dual supply) | VOH | 4.3 | 4.45 | V | Dual supply; 6.4 mA source | 2 | |
| Output HIGH Voltage TMIN to TMAX (dual supply) | VOH | 4.3 | V | Dual supply; TMIN to TMAX | 2 | ||
| Output LOW Voltage (dual supply) | VOL | 0.35 | V | Dual supply; 1.6 mA sink | 2 | ||
| Output LOW Voltage (dual supply) | VOL | 0.44 | 0.5 | V | Dual supply; 6.4 mA sink | 2 | |
| Output LOW Voltage TMIN to TMAX (dual supply) | VOL | 0.5 | V | Dual supply; TMIN to TMAX | 2 | ||
| Offset Voltage (dual supply) | 0.2 | 1 | mV | Dual supply | 2 | ||
| Offset Voltage TMIN to TMAX (dual supply) | 1.5 | mV | Dual supply; TMIN to TMAX | 2 | |||
| Hysteresis (dual supply) | 0.3 | 0.4 | 0.6 | mV | Dual supply; TMIN to TMAX | 2 | |
| Bias Current (dual supply) | 2.5 | 5 | µA | Dual supply; either input | 2 | ||
| Bias Current TMIN to TMAX (dual supply) | 6.5 | µA | Dual supply; TMIN to TMAX, either input | 2 | |||
| Offset Current (dual supply) | 0.04 | 0.25 | µA | Dual supply | 2 | ||
| Offset Current TMIN to TMAX (dual supply) | 0.3 | µA | Dual supply; TMIN to TMAX | 2 | |||
| Power Supply Rejection Ratio (dual supply) | PSRR | 80 | 90 | dB | Dual supply; DC VS ±20% | 2 | |
| Power Supply Rejection Ratio TMIN to TMAX (dual supply) | PSRR | 76 | 88 | dB | Dual supply; TMIN to TMAX | 2 | |
| Common Mode Rejection Ratio (dual supply) | CMRR | 80 | 95 | dB | Dual supply; −10 V < VCM < +10 V | 2 | |
| Common Mode Rejection Ratio TMIN to TMAX (dual supply) | CMRR | 76 | 90 | dB | Dual supply; −10 V < VCM < +10 V, TMIN to TMAX | 2 | |
| Latch Hold Time | tH | 25 | 35 | ns | Dual supply | 2 | |
| Latch Setup Time | tS | 5 | 10 | ns | Dual supply | 2 | |
| LOW Input Level | VIL | 0.8 | V | TMIN to TMAX | 2 | ||
| HIGH Input Level | VIH | 1.6 | V | TMIN to TMAX | 2 | ||
| Latch Input Current | 2.3 | 5 | µA | Dual supply | 2 | ||
| Differential Supply Voltage | 4.5 | 33 | V | VLOGIC = 5 V; TMIN to TMAX | 2 | ||
| Logic Supply Voltage | 4 | 7 | V | TMIN to TMAX | 2 | ||
| Quiescent Current +VS | 8 | 10 | mA | +VS = +15 V | 2 | ||
| Quiescent Current −VS | 4 | 5 | mA | −VS = −15 V | 2 | ||
| Quiescent Current VLOGIC | 2 | 3.3 | mA | VLOGIC = 5 V | 2 | ||
| Power Dissipation (dual supply) | 242 | mW | Dual supply | 2 | |||
| Rated Performance Temperature Range (J grade) | 0 | 70 | °C | TMIN to TMAX, commercial (J) grade | 2 | ||
| Propagation Delay (single supply, J grade) | tPD | 45 | 50 | ns | Single supply; 100 mV step, 5 mV overdrive | 3 | |
| Propagation Delay TMIN to TMAX (single supply, J grade) | tPD | 50 | ns | Single supply; TMIN to TMAX | 3 | ||
| Output HIGH Voltage (single supply) | VOH | 4.65 | V | Single supply; 1.6 mA source | 3 | ||
| Output HIGH Voltage (single supply) | VOH | 4.3 | 4.45 | V | Single supply; 6.4 mA source | 3 | |
| Output HIGH Voltage TMIN to TMAX (single supply) | VOH | 4.3 | V | Single supply; TMIN to TMAX | 3 | ||
| Output LOW Voltage (single supply) | VOL | 0.35 | V | Single supply; 1.6 mA sink | 3 | ||
| Output LOW Voltage (single supply) | VOL | 0.44 | 0.5 | V | Single supply; 6.4 mA sink | 3 | |
| Output LOW Voltage TMIN to TMAX (single supply) | VOL | 0.5 | V | Single supply; TMIN to TMAX | 3 | ||
| Offset Voltage (single supply) | 0.45 | 1.5 | mV | Single supply | 3 | ||
| Offset Voltage TMIN to TMAX (single supply) | 2 | mV | Single supply; TMIN to TMAX | 3 | |||
| Hysteresis (single supply) | 0.3 | 0.5 | 0.75 | mV | Single supply; TMIN to TMAX | 3 | |
| Bias Current (single supply) | 2.7 | 5 | µA | Single supply; either input | 3 | ||
| Offset Current (single supply) | 0.04 | 0.25 | µA | Single supply | 3 | ||
| Offset Current TMIN to TMAX (single supply) | 0.3 | µA | Single supply; TMIN to TMAX | 3 | |||
| Power Supply Rejection Ratio (single supply) | PSRR | 80 | 90 | dB | Single supply; DC 4.5 V ≤ VS ≤ 5.5 V | 3 | |
| Power Supply Rejection Ratio TMIN to TMAX (single supply) | PSRR | 76 | 88 | dB | Single supply; TMIN to TMAX | 3 | |
| Common Mode Input Voltage Lower Limit (single supply) | VCM | 0 | V | Single supply; upper limit is +VS − 2 V (not numeric) | 3 | ||
| Supply Voltage (single supply) | VS | 4.5 | 7 | V | Single supply; TMIN to TMAX | 3 | |
| Quiescent Current (single supply) | 10 | 12 | mA | Single supply | 3 | ||
| Power Dissipation (single supply) | 60 | mW | Single supply | 3 | |||
| Supply Voltage (±, dual supply absolute maximum) | -18 | 18 | V | Supply voltage | 4 | ||
| Internal Power Dissipation | 500 | mW | Note 2 | 4 | |||
| Differential Input Voltage | -16.5 | 16.5 | V | 4 | |||
| Logic Supply Voltage | 7 | V | 4 | ||||
| Storage Temperature Range | -65 | 125 | °C | (N, R) package | 4 | ||
| Lead Temperature Range (soldering) | 300 | °C | Soldering 60 sec | 4 | |||
| Thermal Resistance Junction-to-Ambient (SOIC R-8) | θJA | 160 | °C/watt | SOIC (R-8) package | 4 | ||
| Thermal Resistance Junction-to-Case (SOIC R-8) | θJC | 42 | °C/watt | SOIC (R-8) package | 4 |
CAD (KiCad official)
- Symbol:
AD790JRZ-REEL - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ad790jrz-reel-etched.step/ad790jrz-reel-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad790jrz-reel.step/ad790jrz-reel.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (10 pp, sha256
6b5d756b07e74705, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).