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AD7908BRUZ-REEL7
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Analog Devices Analog To Digital Converters (ADCs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD7908BRUZ-REEL7
Analog Devices · Analog To Digital Converters (ADCs) · TSSOP-20
AD7908BRUZ-REEL7 from Analog Devices, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCLK | input | Serial clock logic input that provides the data access clock and is also the master clock for the conversion process. |
| 2 | DIN | input | Data in logic input; data written to the control register is clocked in on the falling edge of SCLK. |
| 3 | CS | input | Active-low chip select logic input that initiates conversions and frames the serial data transfer. |
| 4 | AGND | power_in | Analog ground reference for all analog circuitry; all AGND pins should be connected together. |
| 5 | AVDD | power_in | Analog power supply input specified from 2.7 V to 5.25 V, and from 4.75 V to 5.25 V for the 0 V to 2 × REFIN input range. |
| 6 | AVDD | power_in | Analog power supply input specified from 2.7 V to 5.25 V, and from 4.75 V to 5.25 V for the 0 V to 2 × REFIN input range. |
| 7 | REFIN | input | External reference input that must be 2.5 V ± 1% for specified performance. |
| 8 | AGND | power_in | Analog ground reference for all analog circuitry; all AGND pins should be connected together. |
| 9 | VIN7 | input | Single-ended analog input channel 7 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 10 | VIN6 | input | Single-ended analog input channel 6 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 11 | VIN5 | input | Single-ended analog input channel 5 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 12 | VIN4 | input | Single-ended analog input channel 4 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 13 | VIN3 | input | Single-ended analog input channel 3 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 14 | VIN2 | input | Single-ended analog input channel 2 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 15 | VIN1 | input | Single-ended analog input channel 1 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 16 | VIN0 | input | Single-ended analog input channel 0 multiplexed into the track-and-hold; unused input channels must be connected to AGND to avoid noise pickup. |
| 17 | AGND | power_in | Analog ground reference for all analog circuitry; all AGND pins should be connected together. |
| 18 | DOUT | output | Serial data output clocked out on the falling edge of SCLK, MSB first, with one leading zero and three channel address bits before the conversion data. |
| 19 | VDRIVE | power_in | Logic power supply input that sets the voltage level at which the serial interface operates. |
| 20 | AGND | power_in | Analog ground reference for all analog circuitry; all AGND pins should be connected together. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-20 |
| Category | Data Converters |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Signal-to-(Noise + Distortion) (SINAD) | SINAD | 49 | dB | fIN = 50 kHz sine wave, fSCLK = 20 MHz; B models | 3 | ||
| Signal-to-Noise Ratio (SNR) | SNR | 49 | dB | fIN = 50 kHz sine wave, fSCLK = 20 MHz; B models | 3 | ||
| Total Harmonic Distortion (THD) | THD | -66 | dB | fIN = 50 kHz sine wave, fSCLK = 20 MHz | 3 | ||
| Peak Harmonic or Spurious Noise (SFDR) | SFDR | -64 | dB | fIN = 50 kHz sine wave, fSCLK = 20 MHz | 3 | ||
| Integral Nonlinearity | INL | -0.2 | 0.2 | LSB | 3 | ||
| Differential Nonlinearity | DNL | -0.2 | 0.2 | LSB | Guaranteed no missed codes to 8 bits | 3 | |
| Offset Error | -0.5 | 0.5 | LSB | 0 V to REFIN input range, straight binary output coding | 3 | ||
| Offset Error Match | -0.05 | 0.05 | LSB | 0 V to REFIN input range, straight binary output coding | 3 | ||
| Gain Error | -0.2 | 0.2 | LSB | 0 V to REFIN input range, straight binary output coding | 3 | ||
| Gain Error Match | -0.05 | 0.05 | LSB | 0 V to REFIN input range, straight binary output coding | 3 | ||
| Positive Gain Error | -0.2 | 0.2 | LSB | 0 V to 2 × REFIN input range, twos complement output coding | 3 | ||
| Positive Gain Error Match | -0.05 | 0.05 | LSB | 0 V to 2 × REFIN input range, twos complement output coding | 3 | ||
| Zero Code Error | -0.5 | 0.5 | LSB | 0 V to 2 × REFIN input range, twos complement output coding | 3 | ||
| Zero Code Error Match | -0.1 | 0.1 | LSB | 0 V to 2 × REFIN input range, twos complement output coding | 3 | ||
| Negative Gain Error | -0.2 | 0.2 | LSB | 0 V to 2 × REFIN input range, twos complement output coding | 3 | ||
| Negative Gain Error Match | -0.05 | 0.05 | LSB | 0 V to 2 × REFIN input range, twos complement output coding | 3 | ||
| DC Leakage Current (analog input) | -1 | 1 | μA | 3 | |||
| REFIN Input Voltage tolerance | REFIN | -1 | 1 | % | 2.5 V ±1% specified performance | 3 | |
| DC Leakage Current (REFIN) | -1 | 1 | μA | 3 | |||
| Input High Voltage | VINH | 0.7 | × VDRIVE | 3 | |||
| Input Low Voltage | VINL | 0.3 | × VDRIVE | 3 | |||
| Input Current | IIN | -1 | 1 | μA | Typically 10 nA, VIN = 0 V or VDRIVE | 3 | |
| Input Capacitance (digital) | CIN | 10 | pF | 3 | |||
| Output High Voltage | VOH | 0.2 | V from VDRIVE | ISOURCE = 200 μA, AVDD = 2.7 V to 5.25 V | 8 | ||
| Output Low Voltage | VOL | 0.4 | V | ISINK = 200 μA | 8 | ||
| Floating-State Leakage Current | -1 | 1 | μA | 8 | |||
| Floating-State Output Capacitance | 10 | pF | 8 | ||||
| Conversion Time | 800 | ns | 16 SCLK cycles with SCLK at 20 MHz | 8 | |||
| Track-and-Hold Acquisition Time | 300 | ns | Sine wave input | 8 | |||
| Throughput Rate | 1 | MSPS | See Serial Interface section | 8 | |||
| AVDD | AVDD | 2.7 | 5.25 | V | 8 | ||
| VDRIVE | VDRIVE | 2.7 | 5.25 | V | 8 | ||
| Normal Mode (Operational) supply current | IDD | 2.7 | mA | AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz | 8 | ||
| Normal Mode (Operational) supply current | IDD | 2 | mA | AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz | 8 | ||
| Using Auto Shutdown Mode (Static) | IDD | 0.5 | μA | Static | 8 | ||
| Full Shutdown Mode | IDD | 0.5 | μA | SCLK on or off (20 nA typ) | 8 | ||
| Normal Mode (Operational) Power Dissipation | 13.5 | mW | AVDD = 5 V, fSCLK = 20 MHz | 8 | |||
| Normal Mode (Operational) Power Dissipation | 6 | mW | AVDD = 3 V, fSCLK = 20 MHz | 8 | |||
| Auto Shutdown Mode (Static) Power Dissipation | 2.5 | μW | AVDD = 5 V | 8 | |||
| Auto Shutdown Mode (Static) Power Dissipation | 1.5 | μW | AVDD = 3 V | 8 | |||
| Full Shutdown Mode Power Dissipation | 2.5 | μW | AVDD = 5 V | 8 | |||
| Full Shutdown Mode Power Dissipation | 1.5 | μW | AVDD = 3 V | 8 | |||
| AVDD to AGND | AVDD | -0.3 | 7 | V | 10 | ||
| VDRIVE to AGND | VDRIVE | -0.3 | V | max AVDD + 0.3 V | 10 | ||
| Digital Input Voltage to AGND | -0.3 | 7 | V | 10 | |||
| Operating Temperature Range (Commercial, B Version) | TA | -40 | 85 | °C | B Version | 10 | |
| Junction Temperature | TJ | 150 | °C | 10 | |||
| TSSOP Package Power Dissipation | 450 | mW | TSSOP package | 10 | |||
| Quiescent supply current, normal mode static | IDD | 600 | μA | AVDD = 2.7 V to 5.25 V, SCLK on or off | 8 | ||
| Aperture Delay | 10 | ns | 3 | ||||
| Full Power Bandwidth (3 dB) | 8.2 | MHz | @ 3 dB | 3 | |||
| Full Power Bandwidth (1.6 MHz) | 1.6 | MHz | @ 0.1 dB | 3 | |||
| Channel-to-Channel Isolation | -85 | dB | fIN = 400 kHz | 3 | |||
| REFIN Input Impedance | 36 | kΩ | fSAMPLE = 1 MSPS | 3 | |||
| Input Capacitance (analog) | 20 | pF | 3 | ||||
| Auto Shutdown Mode supply current | IDD | 960 | μA | fSAMPLE = 250 kSPS | 8 | ||
| Thermal Impedance junction-to-ambient | θJA | 143 | °C/W | TSSOP | 10 | ||
| Thermal Impedance junction-to-case | θJC | 45 | °C/W | TSSOP | 10 |
CAD (KiCad official)
- Symbol:
AD7908BRUZ-REEL7 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
ad7908bruz-reel7-etched.step/ad7908bruz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7908bruz-reel7.step/ad7908bruz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (28 pp, sha256
8d3a9b226094694a, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).