component
AD7866BRUZ
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"mpn": "AD7866BRUZ",
"manufacturer": "Analog Devices",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Data Converters",
"subcategory": "Analog To Digital Converters (ADCs)",
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"lcsc": "C651815",
"digikey": "AD7866BRUZ-ND",
"mouser": "584-AD7866BRUZ"
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"pins": [
{
"number": "1",
"name": "REF SELECT",
"type": "input",
"description": "Logic input that selects the on-chip 2.5 V reference when tied to GND, or an external reference through VREF when tied to logic high."
},
{
"number": "2",
"name": "DCAPB",
"type": "passive",
"description": "Decoupling capacitor connection for the ADC B reference buffer, which can also take the on-chip reference out or input a separate external reference."
},
{
"number": "3",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry, which must not be more than 0.3 V from DGND even on a transient basis."
},
{
"number": "4",
"name": "VB2",
"type": "input",
"description": "Single-ended analog input channel 2 of ADC B, with an input range of 0 V to VREF or 2 x VREF set by RANGE at the falling edge of CS."
},
{
"number": "5",
"name": "VB1",
"type": "input",
"description": "Single-ended analog input channel 1 of ADC B, with an input range of 0 V to VREF or 2 x VREF set by RANGE at the falling edge of CS."
},
{
"number": "6",
"name": "VA2",
"type": "input",
"description": "Single-ended analog input channel 2 of ADC A, with an input range of 0 V to VREF or 2 x VREF set by RANGE at the falling edge of CS."
},
{
"number": "7",
"name": "VA1",
"type": "input",
"description": "Single-ended analog input channel 1 of ADC A, with an input range of 0 V to VREF or 2 x VREF set by RANGE at the falling edge of CS."
},
{
"number": "8",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry, which must not be more than 0.3 V from DGND even on a transient basis."
},
{
"number": "9",
"name": "DCAPA",
"type": "passive",
"description": "Decoupling capacitor connection for the ADC A reference buffer, which can also take the on-chip reference out or input a separate external reference."
},
{
"number": "10",
"name": "VREF",
"type": "power_in",
"description": "Reference decoupling pin connected to the internal 2.5 V reference, which requires a decoupling capacitor and serves as the external reference input when REF SELECT is high."
},
{
"number": "11",
"name": "RANGE",
"type": "input",
"description": "Logic input sampled on the falling edge of CS that sets the input range (low for 0 V to VREF with straight binary, high for 2 x VREF with twos complement)."
},
{
"number": "12",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply voltage of 2.7 V to 5.25 V that must stay within 0.3 V of DVDD even on a transient basis."
},
{
"number": "13",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply voltage of 2.7 V to 5.25 V that must stay within 0.3 V of AVDD even on a transient basis."
},
{
"number": "14",
"name": "DGND",
"type": "power_in",
"description": "Digital ground reference for all digital circuitry, which must not be more than 0.3 V from AGND even on a transient basis."
},
{
"number": "15",
"name": "DOUTA",
"type": "output",
"description": "Serial data output for ADC A that clocks out on the falling edge of SCLK, MSB first, after one leading zero and three STATUS bits."
},
{
"number": "16",
"name": "DOUTB",
"type": "output",
"description": "Serial data output for ADC B that clocks out on the falling edge of SCLK, MSB first, after one leading zero and three STATUS bits."
},
{
"number": "17",
"name": "VDRIVE",
"type": "power_in",
"description": "Logic power supply input that sets the voltage level at which the digital interface operates and should be decoupled to DGND."
},
{
"number": "18",
"name": "SCLK",
"type": "input",
"description": "Serial clock logic input that clocks out the conversion data and sets the conversion rate."
},
{
"number": "19",
"name": "CS",
"type": "input",
"description": "Active-low chip select logic input that initiates conversions on its falling edge and frames the serial data transfer."
},
{
"number": "20",
"name": "A0",
"type": "input",
"description": "Multiplexer select logic input, sampled on the falling edge of CS, that chooses Channel 1 (low) or Channel 2 (high) of both ADCs for the next conversion."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
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"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The MPN is AD7866BRUZ, but the datasheet ordering guide lists AD7866BRU (TSSOP, package option RU-20"
],
"pages_sent": 6,
"cost_usd": 0.0219,
"at": "2026-10-28T16:10:16"
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"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7866.pdf",
"pages": 24,
"sha256": "97330acd060d2794",
"source_tier": "mfr"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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