component

AD7796BRUZ

Public Made by Adom

by adom

Analog Devices Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersad7796bruzfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
ad7796bruz / README.md
History Download
Ray Publish 0.1.0 4331b3b 5d ago

AD7796BRUZ

Analog Devices · Analog To Digital Converters (ADCs) · TSSOP-16

AD7796BRUZ from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial clock input with a Schmitt-triggered input for data transfers to and from the ADC, which may be continuous or non-continuous.
2 CLK bidirectional Clock in/clock out pin where the internal clock can be made available, or the ADC can be driven by an external clock.
3 CS input Active-low chip select input used to select the ADC, which can be hardwired low for 3-wire operation.
4 NC unconnected No connect pin.
5 AIN(+) input Positive terminal of the differential analog input pair AIN(+)/AIN(-).
6 AIN(-) input Negative terminal of the differential analog input pair AIN(+)/AIN(-).
7 NC unconnected No connect pin.
8 NC unconnected No connect pin.
9 REFIN(+) input Positive reference input that can lie between AVDD and GND + 0.1 V, with a nominal reference of 2.5 V between REFIN(+) and REFIN(-).
10 REFIN(-) input Negative reference input that can lie between GND and AVDD - 0.1 V.
11 NC unconnected No connect pin.
12 GND power_in Ground reference point.
13 AVDD power_in Analog supply voltage, 2.7 V to 5.25 V.
14 DVDD power_in Digital interface supply voltage, 2.7 V to 5.25 V, independent of AVDD.
15 DOUT/RDY output Serial data output that also serves as data ready output, going low to indicate completion of a conversion.
16 DIN input Serial data input that accesses the input shift register of the ADC.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category Data Converters
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage AVDD AVDD 2.7 5.25 V AVDD, GND 4
Power supply voltage DVDD DVDD 2.7 5.25 V DVDD, GND 4
IDD current IDD 325 µA 250 µA typ at AVDD = 3 V, 280 µA typ at AVDD = 5 V 4
IDD power-down mode current IDD 1 µA Power-down mode 4
Power supply rejection 90 dB AIN = 1 V/128 3
Average input current 250 pA Update rate < 100 Hz 3
Common-mode voltage VCM VCM 0.5 V VCM = (AIN(+) + AIN(-))/2 3
Normal mode rejection, internal clock, 50 Hz and 60 Hz 65 dB At 50 Hz, 60 Hz; typ 80 dB at 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 3
Normal mode rejection, internal clock, 50 Hz 80 dB At 50 Hz; typ 90 dB at 50 ± 1 Hz, FS[3:0] = 10016 3
Normal mode rejection, internal clock, 60 Hz 90 dB At 60 Hz; typ 100 dB at 60 ± 1 Hz, FS[3:0] = 10006 3
Normal mode rejection, external clock, 50 Hz and 60 Hz 80 dB At 50 Hz, 60 Hz; typ 90 dB at 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 3
Normal mode rejection, external clock, 50 Hz 94 dB At 50 Hz; typ 100 dB at 50 ± 1 Hz, FS[3:0] = 10016 3
Normal mode rejection, external clock, 60 Hz 90 dB At 60 Hz; typ 100 dB at 60 ± 1 Hz, FS[3:0] = 10006 3
Common-mode rejection at DC 90 dB AIN = 7.81 mV 3
Common-mode rejection at 50 Hz and 60 Hz, FS[3:0] = 10106 90 dB 50 ± 1 Hz, 60 ± 1 Hz, FS[3:0] = 10106 3
Common-mode rejection at 50 Hz and 60 Hz, FS[3:0] = 10016 and 10006 90 dB 50 ± 1 Hz (FS[3:0] = 10016), 60 ± 1 Hz, FS[3:0] = 10006 3
Reference voltage range 0.1 V 3
Logic input low voltage CS, DVDD = 5 V VINL 0.8 V DVDD = 5 V 4
Logic input low voltage CS, DVDD = 3 V VINL 0.4 V DVDD = 3 V 4
Logic input high voltage CS VINH 2 V DVDD = 3 V or 5 V 4
Schmitt trigger VT(+), DVDD = 5 V VT(+) 1.4 2 V DVDD = 5 V 4
Schmitt trigger VT(-), DVDD = 5 V VT(-) 0.8 1.7 V DVDD = 5 V 4
Schmitt trigger hysteresis VT(+) − VT(-), DVDD = 5 V VT(+) − VT(-) 0.1 0.17 V DVDD = 5 V 4
Schmitt trigger VT(+), DVDD = 3 V VT(+) 0.9 2 V DVDD = 3 V 4
Schmitt trigger VT(-), DVDD = 3 V VT(-) 0.4 1.35 V DVDD = 3 V 4
Schmitt trigger hysteresis VT(+) − VT(-), DVDD = 3 V VT(+) − VT(-) 0.06 0.13 V DVDD = 3 V 4
Digital input current 10 µA VIN = DVDD or GND 4
Output high voltage VOH, DVDD = 5 V VOH 4 V DVDD = 5 V, ISOURCE = 200 µA 4
Output low voltage VOL, DVDD = 3 V VOL 0.4 V DVDD = 3 V, ISINK = 100 µA 4
Output low voltage VOL, DVDD = 5 V VOL 0.4 V DVDD = 5 V, ISINK = 1.6 mA (DOUT/RDY)/800 µA (CLK) 4
Floating-state leakage current 10 µA 4
SCLK high pulse width t3 100 ns 5
SCLK low pulse width t4 100 ns 5
CS falling edge to DOUT/RDY active time t1 0 ns 5
CS falling edge to DOUT/RDY active time, DVDD = 4.75 V to 5.25 V t1 60 ns DVDD = 4.75 V to 5.25 V 5
CS falling edge to DOUT/RDY active time, DVDD = 2.7 V to 3.6 V t1 80 ns DVDD = 2.7 V to 3.6 V 5
SCLK active edge to data valid delay, DVDD = 4.75 V to 5.25 V t2 60 ns DVDD = 4.75 V to 5.25 V 5
SCLK active edge to data valid delay, DVDD = 2.7 V to 3.6 V t2 80 ns DVDD = 2.7 V to 3.6 V 5
SCLK active edge to data valid delay t2 0 ns 5
Bus relinquish time after CS inactive edge t5 10 ns 5
Bus relinquish time after CS inactive edge, max t5 80 ns 5
SCLK inactive edge to CS inactive edge t6 0 ns 5
SCLK inactive edge to DOUT/RDY high t7 10 ns 5
CS falling edge to SCLK active edge setup time t8 0 ns 5
Data valid to SCLK edge setup time t9 30 ns 5
Data valid to SCLK edge hold time t10 25 ns 5
CS rising edge to SCLK edge hold time t11 0 ns 5
AVDD to GND AVDD -0.3 7 V TA = 25°C 7
DVDD to GND DVDD -0.3 7 V TA = 25°C 7
AIN/digital input current 10 mA TA = 25°C 7
Operating temperature range -40 85 °C 7
Storage temperature range -65 150 °C 7
Maximum junction temperature 150 °C 7
Lead temperature, soldering vapor phase (60 sec) 215 °C Vapor phase, 60 sec 7
Lead temperature, soldering infrared (15 sec) 220 °C Infrared, 15 sec 7
Thermal resistance θJA, TSSOP θJA 128 °C/W Worst-case, device soldered in circuit board 7

CAD (KiCad official)

  • Symbol: AD7796BRUZ
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ad7796bruz-etched.step / ad7796bruz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7796bruz.step / ad7796bruz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (24 pp, sha256 61d94bb6d0fc644d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF