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AD7790BRMZ-REEL

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Analog Devices Analog To Digital Converters (ADC), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD7790BRMZ-REEL

Analog Devices · Analog To Digital Converters (ADC) · MSOP-10

AD7790BRMZ-REEL from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCLK input Serial clock input for ADC data transfer, with a Schmitt-trigger input suited to opto-isolated interfaces, and it may run continuously or non-continuously.
2 CS input Active-low chip select input that selects the ADC on a shared serial bus, and it can be hard-wired low for 3-wire operation.
3 AIN(+) input Positive terminal of the fully differential analog input, which must stay between GND + 100 mV and VDD - 100 mV in buffered mode and between GND - 30 mV and VDD + 30 mV in unbuffered mode.
4 AIN(-) input Negative terminal of the fully differential analog input, with the same absolute voltage limits as AIN(+) for the selected buffered or unbuffered mode.
5 REFIN(+) input Positive reference voltage input that may sit between GND + 0.1 V and VDD, with a nominal REFIN of 2.5 V and a usable reference range of 0.1 V to VDD.
6 REFIN(-) input Negative reference voltage input that may be any value between GND and VDD - 0.1 V.
7 GND power_in Ground reference point for the device, and the datasheet recommends connecting it to the system AGND plane.
8 VDD power_in Power supply input, which operates from 2.5 V to 5.25 V.
9 DOUT/RDY tri_state Serial data output and data-ready output that goes low when a conversion is complete and returns high after the data is read or before the next update, and it is tri-stated when CS is high.
10 DIN input Serial data input to the ADC input shift register, where the register-select bits in the communications register determine the target register.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category Data Acquisition
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output update rate (nominal range) 9.5 120 Hz nominal min / nominal max 3
No missing codes 16 bit ±VREF range, update rate ≤ 20 Hz 3
Integral nonlinearity -15 3.5 15 ppm of full-scale range 3
Power supply rejection 90 100 dB input range = ±REFIN 3
Average analog input current (buffered mode) -1 1 nA buffered mode 3
Serial mode rejection @ 50 Hz, 60 Hz 65 73 dB 50 ± 1 Hz, 60 ± 1 Hz, FS[2:0] = 100 3
Serial mode rejection @ 50 Hz 80 90 dB 50 ± 1 Hz, FS[2:0] = 101 3
Serial mode rejection @ 60 Hz 80 90 dB 60 ± 1 Hz, FS[2:0] = 011 3
Common-mode rejection @ DC 90 100 dB input range = ±REFIN, AIN = 1 V, FS[2:0] = 100 3
Common-mode rejection @ 50 Hz, 60 Hz 100 dB input range = ±REFIN, AIN = 1 V; 50 ± 1 Hz (FS[2:0] = 101), 60 ± 1 Hz (FS[2:0] = 011) 3
Reference voltage range (REFIN) REFIN 0.1 V 3
Logic input low voltage VINL 0.8 V 4
Logic input low voltage VINL 0.4 V VDD = 3 V 4
Logic input high voltage VINH 2 V VDD = 3 V or 5 V 4
SCLK Schmitt positive threshold VT(+) 1.4 2 V VDD = 5 V 4
SCLK Schmitt negative threshold VT(-) 0.8 1.4 V VDD = 5 V 4
SCLK Schmitt hysteresis VT(+) - VT(-) 0.3 0.85 V VDD = 5 V 4
SCLK Schmitt positive threshold VT(+) 0.9 2 V VDD = 3 V 4
SCLK Schmitt negative threshold VT(-) 0.4 1.1 V VDD = 3 V 4
Logic input current (all inputs except SCLK) -1 1 uA 4
Logic output low voltage VOL 0.4 V VDD = 3 V, ISINK = 100 uA 4
Logic output high voltage VOH 4 V VDD = 5 V, ISOURCE = 200 uA 4
Floating-state (tri-state) leakage current -1 1 uA 4
Supply voltage VDD 2.5 5.25 V VDD - GND 4
Supply current, normal mode, unbuffered IDD 65 75 uA VDD = 3.6 V, unbuffered mode 4
Supply current, buffered mode IDD 130 145 uA VDD = 3.6 V, buffered mode 4
Supply current, normal mode, unbuffered IDD 73 80 uA VDD = 5.25 V, unbuffered mode 4
Supply current, buffered mode IDD 145 160 uA VDD = 5.25 V, buffered mode 4
Power-down supply current IDD (power-down) 1 uA VIN = VDD or GND, all digital inputs 4
VDD to GND VDD -0.3 7 V TA = 25°C unless otherwise noted 7
Analog input voltage to GND AIN -0.3 V TA = 25°C unless otherwise noted 7
Reference input voltage to GND REFIN -0.3 V TA = 25°C unless otherwise noted 7
AIN/REFIN total current 30 mA TA = 25°C unless otherwise noted 7
Digital input voltage to GND -0.3 V TA = 25°C unless otherwise noted 7
Digital output voltage to GND -0.3 V TA = 25°C unless otherwise noted 7
Operating temperature range TA -40 105 °C 7
Storage temperature range -65 150 °C 7
Maximum junction temperature 150 °C 7
Pin temperature, soldering 300 °C 10 s 7
IR reflow peak temperature 220 °C 7
Thermal resistance, junction to ambient θJA 206 °C/W MSOP 7
Thermal resistance, junction to case θJC 44 °C/W MSOP 7
SCLK high pulse width t3 100 ns B grade 5
SCLK low pulse width t4 100 ns B grade 5
CS falling edge to DOUT/RDY valid (read) t1 0 60 ns VDD = 4.75 V to 5.25 V, B grade 5
CS falling edge to DOUT/RDY valid (read) t1 0 80 ns VDD = 2.5 V to 3.6 V, B grade 5
SCLK active edge to data valid delay (read) t2 0 60 ns VDD = 4.75 V to 5.25 V, B grade 5
SCLK active edge to data valid delay (read) t2 0 80 ns VDD = 2.5 V to 3.6 V, B grade 5
Bus relinquish time after CS inactive edge t5 10 80 ns B grade 5
SCLK inactive edge to CS inactive edge t6 100 ns B grade 5
SCLK inactive edge to DOUT/RDY high t7 10 ns B grade 5
CS falling edge to SCLK active edge setup (write) t8 0 ns B grade 5
Data valid to SCLK edge setup (write) t9 30 ns B grade 5
Data valid to SCLK edge hold (write) t10 25 ns B grade 5
CS rising edge to SCLK edge hold (write) t11 0 ns B grade 5

CAD (KiCad official)

  • Symbol: AD7790BRMZ-REEL
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad7790brmz-reel-etched.step / ad7790brmz-reel-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7790brmz-reel.step / ad7790brmz-reel.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 4dd9ba61e1ddc82f, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF