# AD7767BRUZ-2-RL7

**Analog Devices** · Analog To Digital Converters (ADCs) · TSSOP-16

AD7767BRUZ-2-RL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AVDD | power_in | +2.5 V analog power supply input. |
| 2 | VREF+ | power_in | External reference input that must be driven, with a range of 2.4 V to 5 V and independent of the AVDD voltage. |
| 3 | REFGND | power_in | Reference ground, to which the VREF+ input should be decoupled. |
| 4 | VIN+ | power_in | Positive input of the differential analog input. |
| 5 | VIN− | power_in | Negative input of the differential analog input. |
| 6 | AGND | power_in | Power supply ground for the analog circuitry. |
| 7 | SYNC/PD | input | Dual-function input used to synchronize multiple AD7767 devices and/or place the device into power-down mode. |
| 8 | DVDD | power_in | +2.5 V digital power supply input; may share the VDRIVE rail when 2.5 V logic is used. |
| 9 | VDRIVE | power_in | Logic power supply input from 1.8 V to 3.6 V that sets the operating voltage of the digital logic interface. |
| 10 | SDO | tri_state | Serial data output carrying the 24-bit, two's complement, MSB-first conversion result, enabled by CS. |
| 11 | DGND | power_in | Digital logic power supply ground. |
| 12 | DRDY | output | Data ready output; a falling edge indicates a new conversion result is available in the output register. |
| 13 | SCLK | input | Serial clock input that provides the clock for all serial data transfers with the device. |
| 14 | MCLK | input | Main clock input; the AD7767 sampling frequency equals the MCLK frequency. |
| 15 | SDI | input | Serial data input, the daisy-chain input of the AD7767. |
| 16 | CS | input | Chip select input that selects the device and enables the SDO pin when driven low. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-16 |
| Category | Data Converters |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| AVDD to AGND |  | -0.3 |  | 3 | V |  | 8 |
| DVDD to DGND |  | -0.3 |  | 3 | V |  | 8 |
| AVDD to DVDD |  | -0.3 |  | 0.3 | V |  | 8 |
| VREF+ to REFGND |  | -0.3 |  | 7 | V |  | 8 |
| REFGND to AGND |  | -0.3 |  | 0.3 | V |  | 8 |
| VDRIVE to DGND |  | -0.3 |  | 6 | V |  | 8 |
| VIN+, VIN- to AGND |  | -0.3 |  |  | V | upper limit printed as VREF+ + 0.3 V (not numeric) | 8 |
| Digital inputs to DGND |  | -0.3 |  |  | V | upper limit printed as VDRIVE + 0.3 V (not numeric) | 8 |
| Digital outputs to DGND |  | -0.3 |  |  | V | upper limit printed as VDRIVE + 0.3 V (not numeric) | 8 |
| AGND to DGND |  | -0.3 |  | 0.3 | V |  | 8 |
| Input current to any pin except supplies |  | -10 |  | 10 | mA | to any pin except supplies | 8 |
| Operating temperature range |  | -40 |  | 105 | °C |  | 8 |
| Storage temperature range |  | -65 |  | 150 | °C |  | 8 |
| Junction temperature |  |  |  | 150 | °C |  | 8 |
| ESD |  |  |  | 1 | kV | ESD model not stated | 8 |
| Analog input protection diode current |  |  |  | 130 | mA | analog input ESD diodes conducting when VIN exceeds VREF+ by more than 0.3 V | 16 |
| VDRIVE logic power supply input | VDRIVE | 1.8 |  | 3.6 | V | sets operating voltage of the digital logic interface (pin 9) | 9 |
| VREF+ reference input range | VREF+ | 2.4 |  | 5 | V | external reference input, pin 2, per pin description | 9 |
| VREF+ reference input range | VREF+ | 2.2 |  |  | V | range printed as 2.2 V to 2 × AVDD (upper limit not numeric) | 16 |
| Digital interface supply voltage |  | 1.7 |  | 3.6 | V | interface specified to operate between | 16 |
| AVDD and DVDD supply tolerance | AVDD, DVDD | -5 |  | 5 | % | around nominal 2.5 V; printed as AVDD = DVDD = 2.5 V ± 5% | 10 |
| AVDD and DVDD nominal supply | AVDD, DVDD |  | 2.5 |  | V | 2.5 V supply applied to DVDD and AVDD pins | 16 |
| Maximum MCLK frequency | MCLK |  |  | 1.024 | MHz | maximum MCLK frequency per timing table footnote 1 | 7 |
| Thermal impedance, junction-to-ambient | θJA |  | 150.4 |  | °C/W | TSSOP package | 8 |
| Thermal impedance, junction-to-case | θJC |  | 27.6 |  | °C/W | TSSOP package | 8 |

## CAD (KiCad official)

- Symbol: `AD7767BRUZ-2-RL7`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `ad7767bruz-2-rl7-etched.step` / `ad7767bruz-2-rl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7767bruz-2-rl7.step` / `ad7767bruz-2-rl7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD7767.pdf) (23 pp, sha256 `d201984eb51bee3c`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad7767bruz-2-rl7-datasheet.pdf)