AD7746ARUZ from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SCL	input	Serial interface clock input connected to the master clock line, requiring a pull-up resistor if the system does not provide one.
2	RDY	output	Logic output that falls to indicate a finished conversion on the enabled channel(s), and may be left as an open circuit if unused.
3	EXCA	output	CDC excitation output; the measured capacitance is connected between one EXC pin and one CIN pin, and it may be left open if unused.
4	EXCB	output	CDC excitation output; the measured capacitance is connected between one EXC pin and one CIN pin, and it may be left open if unused.
5	REFIN(+)	input	Positive differential voltage reference input for the voltage channel (ADC), which is not used by the capacitive channels and may be left open or tied to GND if unused.
6	REFIN(-)	input	Negative differential voltage reference input for the voltage channel (ADC), which is not used by the capacitive channels and may be left open or tied to GND if unused.
7	CIN1(-)	input	Negative capacitive input in differential mode, internally disconnected in single-ended CDC configuration, and may be left open or tied to GND if unused.
8	CIN1(+)	input	Capacitive input in single-ended mode or positive capacitive input in differential mode, connected between one EXC pin and one CIN pin, and may be left open or tied to GND if unused.
9	CIN2(+)	input	Second capacitive input in single-ended mode or positive capacitive input in differential mode, and may be left open or tied to GND if unused.
10	CIN2(-)	input	Negative capacitive input in differential mode, internally disconnected in single-ended CDC configuration, and may be left open or tied to GND if unused.
11	VIN(+)	power_in	Positive differential voltage input for the voltage channel (ADC), also used to connect an external temperature sensing diode, and may be left open or tied to GND if unused.
12	VIN(-)	power_in	Negative differential voltage input for the voltage channel (ADC), also used to connect an external temperature sensing diode, and may be left open or tied to GND if unused.
13	GND	power_in	Ground pin for the device.
14	VDD	power_in	Power supply pin, to be decoupled to GND with a low impedance capacitor such as a 10 µF tantalum in parallel with a 0.1 µF multilayer ceramic; the datasheet specifies 2.7 V to 5.25 V single-supply operation.
15	NC	unconnected	Not connected; this pin should be left as an open circuit.
16	SDA	bidirectional	Serial interface bidirectional data line connected to the master data line, requiring a pull-up resistor if the system does not provide one.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-16
Category	Interface ICs
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Integral Nonlinearity (INL)		-0.01		0.01	% of FSR		3
Absolute Error		-4		4	fF	25°C, VDD = 5 V, after offset calibration	3
Gain Drift vs. Temperature		-28	-26	-24	ppm of FS/°C		3
CAPDAC Drift vs. Temperature		24	26	28	ppm of FS/°C		3
System Offset Calibration Range		-1		1	pF		3
Offset Error		-3		3	µV	Voltage input	3
Gain Error			0.02	0.08	% of FS	25°C, VDD = 5 V	3
Allowed Capacitance to GND				60	pF	See Figure 9 and Figure 10	3
Allowed Capacitance to GND				100	pF	See Figure 11	3
Average DC Voltage Across Capacitance				40	mV	Magnitude below ±40 mV	3
Full-Scale Error			0.025	0.1	% of FS	Voltage input	3
Internal Temperature Sensor Error			0.5	2	°C	Internal temperature sensor	3
External Sensing Diode Error		-2		2	°C	External sensing diode	3
Absolute VIN Voltage		-0.03			V	Relative to GND; upper limit printed as VDD + 0.03 V	3
Power Supply Rejection			0.3	1	fF/V		3
Full Range CAPDAC			17	21	pF		3
Integral Nonlinearity (INL) voltage input			3	15	ppm of FS	Voltage input	3
SCL Frequency		0		400	kHz	See Figure 3	5
SCL High Pulse Width	tHIGH	0.6			µs		5
SCL Low Pulse Width	tLOW	1.3			µs		5
SCL, SDA Rise Time	tR			0.3	µs		5
SCL, SDA Fall Time	tF			0.3	µs		5
Hold Time (Start Condition)	tHD;STA	0.6			µs	After this period, the first clock is generated	5
Set-Up Time (Start Condition)	tSU;STA	0.6			µs	Relevant for repeated start condition	5
Data Set-Up Time	tSU;DAT	0.25			µs	VDD ≥ 3.0 V	5
Data Set-Up Time	tSU;DAT	0.35			µs	VDD < 3.0 V	5
Set-Up Time (Stop Condition)	tSU;STO	0.6			µs		5
Data Hold Time (Master)	tHD;DAT	0			µs		5
Bus-Free Time (Between Stop and Start Condition)	tBUF	1.3			µs		5
Positive Supply Voltage VDD to GND		-0.3		6.5	V		6
Voltage on any Input or Output Pin to GND		-0.3			V	Upper limit printed as VDD + 0.3 V	6
Operating Temperature Range		-40		125	°C		6
Storage Temperature Range		-65		150	°C		6
Junction Temperature				150	°C		6
Lead Temperature, Soldering Vapor Phase				215	°C	60 sec	6
Lead Temperature, Soldering Infrared				220	°C	15 sec	6
ESD Rating (Human Body Model)				2000	V	ESD Association HBM, S5.1	6
TSSOP Thermal Impedance-to-Air	θJA		128		°C/W		6
TSSOP Thermal Impedance-to-Case	θJC		14		°C/W		6
Offset Drift vs. Temperature			-1		aF/°C		3
Resolution, p-p			16.5		Bit	Conversion time = 62 ms	3
Resolution Effective			19		Bit	Conversion time = 62 ms	3
No Missing Codes			24		Bit	Conversion time ≥ 62 ms	3
Output Noise, rms			2		aF/√Hz	See Table 5	3
Offset Error			32		aF	After system offset calibration, excluding effect of noise	3
Normal Mode Rejection			65		dB	50 Hz ± 1%, conversion time = 62 ms	3
Normal Mode Rejection			55		dB	60 Hz ± 1%, conversion time = 62 ms	3
Channel-to-Channel Isolation			70		dB	AD7746 only	3
CAPDAC Resolution			164		fF	7-bit CAPDAC	3
Excitation Frequency			32		kHz		3
Temperature Sensor Resolution			0.1		°C	VREF internal	3
Offset Drift vs. Temperature (voltage input)			15		nV/°C	Voltage input	3

CAD (KiCad official)

Symbol: AD7746ARUZ
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: ad7746aruz-etched.step / ad7746aruz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7746aruz.step / ad7746aruz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (28 pp, sha256 567331d82161a3f1, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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AD7746ARUZ

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