# AD7741BRZ-REEL7

**Analog Devices** · Analog To Digital Converters (ADCs) · SOIC-8

AD7741BRZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply input that operates from +4.75 V to +5.25 V and should be adequately decoupled to GND. |
| 2 | GND | power_in | Ground reference point for all circuitry on the part. |
| 3 | CLKOUT | output | External clock output that connects to the crystal when one is used, provides an inverted clock when CLKIN is externally driven, and should be buffered if used elsewhere in the system. |
| 4 | CLKIN | input | External clock input accepting a crystal or CMOS-compatible clock with a master clock frequency up to 6 MHz. |
| 5 | REFIN/OUT | bidirectional | Reference input to the VFC core that defines the span; when left unconnected the internal 2.5 V reference is used, and an external precision reference can overdrive it. |
| 6 | VIN | power_in | Buffered analog input to the VFC with an input range from 0 V to VREF that draws virtually no current from its source. |
| 7 | PD | input | Active-low power-down pin; when low the part enters power-down mode, where it typically consumes 15 µA. |
| 8 | fOUT | output | Frequency output that provides the output of the synchronous VFC. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Data Converters |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Integral Nonlinearity |  | -0.012 |  | 0.012 | % of Span | fCLKIN = 200 kHz | 2 |
| Integral Nonlinearity |  | -0.024 |  | 0.024 | % of Span | fCLKIN = 6.144 MHz, VDD > 4.8 V | 2 |
| Offset Error |  | -40 |  | 40 | mV |  | 2 |
| Gain Error |  | 0 | 0.8 | 1.6 | % of Span |  | 2 |
| Offset Error Drift |  | -30 |  | 30 | µV/°C |  | 2 |
| Gain Error Drift |  | -16 |  | 16 | ppm of Span/°C |  | 2 |
| Power Supply Rejection Ratio |  |  | -63 |  | dB | ΔVDD = ±5% | 2 |
| Input Current |  | -100 |  | 100 | nA |  | 2 |
| Input Voltage Range |  | 0 |  |  | V | upper limit VREF | 2 |
| REFOUT Output Voltage |  | 2.38 | 2.5 | 2.6 | V |  | 2 |
| Output Impedance |  |  | 1 |  | kΩ | REFOUT | 2 |
| Reference Drift |  | -50 |  | 50 | ppm/°C |  | 2 |
| Line Rejection |  |  | -60 |  | dB |  | 2 |
| Reference Noise |  |  | 100 |  | µV p-p | 0.1 Hz to 10 Hz | 2 |
| Output High Voltage | VOH | 4 |  |  | V | Output sourcing 800 µA | 2 |
| Output Low Voltage | VOL |  |  | 0.4 | V | Output sinking 1.6 mA | 2 |
| Input High Voltage (PD) | VIH | 2.4 |  |  | V | PD only | 2 |
| Input Low Voltage (PD) | VIL |  |  | 0.8 | V | PD only | 2 |
| Input Current (PD) |  | -100 |  | 100 | nA | PD only | 2 |
| Pin Capacitance (PD) |  |  | 6 | 10 | pF | PD only | 2 |
| Input High Voltage (CLKIN) | VIH | 3.5 |  |  | V | CLKIN only | 2 |
| Input Low Voltage (CLKIN) | VIL |  |  | 0.8 | V | CLKIN only | 2 |
| Input Current (CLKIN) |  | -2 |  | 2 | µA | CLKIN only | 2 |
| Pin Capacitance (CLKIN) |  |  | 6 | 10 | pF | CLKIN only | 2 |
| Input Frequency |  |  |  | 6.144 | MHz | For specified performance | 2 |
| VDD | VDD | 4.75 |  | 5.25 | V |  | 2 |
| IDD (Normal Mode) | IDD |  |  | 8 | mA | Output unloaded | 2 |
| IDD (Power-Down) | IDD |  | 15 | 35 | µA |  | 2 |
| Power-Up Time |  |  | 30 |  | µs | Coming out of power-down mode | 2 |
| VDD to GND | VDD | -0.3 |  | 7 | V |  | 4 |
| Operating Temperature Range (Industrial B Version) |  | -40 |  | 85 | °C |  | 4 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 4 |
| Junction Temperature |  |  |  | 150 | °C |  | 4 |
| Power Dissipation (SOIC) |  |  |  | 450 | mW | SOIC package | 4 |
| Thermal Impedance θJA (8 Lead, SOIC) | θJA |  | 157 |  | °C/W | SOIC package, 8 lead | 4 |
| Lead Temperature Vapor Phase (60 sec) |  |  |  | 215 | °C | Vapor phase, 60 sec | 4 |
| Lead Temperature Infrared (15 sec) |  |  |  | 220 | °C | Infrared, 15 sec | 4 |
| Maximum Clock Frequency | fCLKIN |  |  | 6.144 | MHz |  | 4 |
| Input Clock Mark/Space Ratio (high) | tHIGH/tLOW |  |  | 55 | % | Input clock mark/space ratio | 4 |
| Input Clock Mark/Space Ratio (low) | tHIGH/tLOW | 45 |  |  | % | Input clock mark/space ratio | 4 |
| fCLOCK Rising Edge to fOUT Rising Edge | t1 |  | 9 |  | ns |  | 4 |
| fOUT Rise Time | t2 |  | 4 |  | ns |  | 4 |
| fOUT Fall Time | t3 |  | 4 |  | ns |  | 4 |
| fOUT Pulsewidth | t4 | -5 |  | 5 | ns | tHIGH ± 5 ns | 4 |

## CAD (KiCad official)

- Symbol: `AD7741BRZ-REEL7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ad7741brz-reel7-etched.step` / `ad7741brz-reel7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7741brz-reel7.step` / `ad7741brz-reel7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/876/AD7741%2CAD7742.pdf) (12 pp, sha256 `9ed3fb9faa02b73a`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad7741brz-reel7-datasheet.pdf)