component
AD7694BRMZ
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD7694BRMZ
Analog Devices · Analog To Digital Converters (ADCs) · MSOP-8
AD7694BRMZ from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | passive | Reference input voltage range is 1 V to VDD, referred to GND, and the pin should be decoupled closely with a ceramic capacitor of a few µF. |
| 2 | IN+ | passive | Analog input referred to IN−, where the differential input voltage (IN+ minus IN−) spans 0 V to VREF. |
| 3 | IN− | passive | Analog input ground sense, to be connected to the analog ground plane or to a remote sense ground. |
| 4 | GND | power_in | Power supply ground. |
| 5 | CNV | input | Convert input whose leading edge initiates a conversion and which enables the SDO pin when low. |
| 6 | SDO | output | Serial data output on which the conversion result is presented, synchronized to SCK. |
| 7 | SCK | input | Serial data clock input which, while CNV is low, shifts the conversion result out on SDO. |
| 8 | VDD | power_in | Power supply, specified from 2.7 V to 5.25 V with respect to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Data Converters |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute Input Voltage IN+ | -0.1 | V | 3 | ||||
| Absolute Input Voltage IN− | -0.1 | 0.1 | V | 3 | |||
| Leakage Current at 25°C | 1 | nA | Acquisition phase | 3 | |||
| No Missing Codes | 16 | Bits | 3 | ||||
| Integral Linearity Error | -4 | 4 | LSB | 3 | |||
| Gain Error | -15 | 2 | 15 | LSB | TMIN to TMAX | 3 | |
| Gain Error Temperature Drift | -0.3 | 0.3 | ppm/°C | 3 | |||
| Offset Error | -3.5 | 0.7 | 3.5 | mV | TMIN to TMAX | 3 | |
| Offset Temperature Drift | -0.3 | 0.3 | ppm/°C | 3 | |||
| Conversion Rate | 0 | 250 | kSPS | VDD = 4.75 V to 5.25 V | 3 | ||
| Conversion Rate | 0 | 150 | kSPS | VDD = 2.7 V to 4.75 V | 3 | ||
| VIL | VIL | 0.8 | V | VDD = 4.75 V | 4 | ||
| VIL | VIL | 0.45 | V | VDD = 2.7 V | 4 | ||
| VIH | VIH | 3.15 | V | VDD = 5.25 V | 4 | ||
| VIH | VIH | 1.9 | V | VDD = 3.3 V | 4 | ||
| Input Leakage Current Low | IIL | -1 | 1 | µA | 4 | ||
| Input Leakage Current High | IIH | -1 | 1 | µA | 4 | ||
| VOL | VOL | 0.4 | V | ISINK = +500 µA | 4 | ||
| Supply Voltage VDD | VDD | 2.7 | 5.25 | V | Specified performance | 4 | |
| Operating Current | 0.8 | 1.2 | mA | VDD = 5 V, 100 kSPS throughput | 4 | ||
| Operating Current | 540 | 960 | µA | VDD = 2.7 V, 100 kSPS throughput | 4 | ||
| Standby Current | 1 | 50 | nA | VDD = 5 V, 25°C | 4 | ||
| Reference Voltage Range | 1 | V | 4 | ||||
| Load Current | 50 | µA | 250 kSPS, VIN+ − VIN− = VREF/2 = 2.5 V | 4 | |||
| Specified Performance Temperature Range | TMIN to TMAX | -40 | 85 | °C | 4 | ||
| Conversion Time: CNV Rising Edge to Data Available | tCONV | 3.2 | µs | VDD = 4.75 V to 5.25 V | 5 | ||
| Time Between Conversions | tCYC | 4 | µs | VDD = 4.75 V to 5.25 V | 5 | ||
| SCK Period | tSCK | 50 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| SCK Low Time | tSCKL | 20 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| SCK High Time | tSCKH | 20 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| SCK Falling Edge to Data Remains Valid | tHSDO | 5 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| SCK Falling Edge to Data Valid Delay | tDSDO | 20 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| CNV Low to SDO, D15 MSB Valid | tEN | 60 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| CNV High to SDO High Impedance | tDIS | 60 | ns | VDD = 4.75 V to 5.25 V | 5 | ||
| Conversion Time: CNV Rising Edge to Data Available | tCONV | 4.66 | µs | VDD = 2.7 V to 4.75 V | 5 | ||
| Time Between Conversions | tCYC | 6.66 | µs | VDD = 2.7 V to 4.75 V | 5 | ||
| SCK Period | tSCK | 125 | ns | VDD = 2.7 V to 4.75 V | 5 | ||
| SCK Low Time | tSCKL | 50 | ns | VDD = 2.7 V to 4.75 V | 5 | ||
| SCK High Time | tSCKH | 50 | ns | VDD = 2.7 V to 4.75 V | 5 | ||
| SCK Falling Edge to Data Valid Delay | tDSDO | 50 | ns | VDD = 2.7 V to 4.75 V | 5 | ||
| CNV Low to SDO, D15 MSB Valid | tEN | 120 | ns | VDD = 2.7 V to 4.75 V | 5 | ||
| CNV High to SDO High Impedance | tDIS | 120 | ns | VDD = 2.7 V to 4.75 V | 5 | ||
| VDD to GND | VDD | -0.3 | 7 | V | 6 | ||
| Analog Inputs IN+, IN− current | -130 | 130 | mA | Input current, or GND − 0.3 V to VDD + 0.3 V voltage rating | 6 | ||
| Storage Temperature Range | -65 | 150 | °C | 6 | |||
| Junction Temperature | 150 | °C | 6 | ||||
| Lead Temperature, Vapor Phase | 215 | °C | 60 sec | 6 | |||
| Lead Temperature, Infrared | 220 | °C | 15 sec | 6 | |||
| Thermal Impedance Junction-to-Ambient | θJA | 200 | °C/W | MSOP-8 | 6 | ||
| Thermal Impedance Junction-to-Case | θJC | 44 | °C/W | MSOP-8 | 6 |
CAD (KiCad official)
- Symbol:
AD7694BRMZ - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
ad7694brmz-etched.step/ad7694brmz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7694brmz.step/ad7694brmz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
be5fe9921dea801f, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD7694BRMZ
**Analog Devices** · Analog To Digital Converters (ADCs) · MSOP-8
AD7694BRMZ from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | passive | Reference input voltage range is 1 V to VDD, referred to GND, and the pin should be decoupled closely with a ceramic capacitor of a few µF. |
| 2 | IN+ | passive | Analog input referred to IN−, where the differential input voltage (IN+ minus IN−) spans 0 V to VREF. |
| 3 | IN− | passive | Analog input ground sense, to be connected to the analog ground plane or to a remote sense ground. |
| 4 | GND | power_in | Power supply ground. |
| 5 | CNV | input | Convert input whose leading edge initiates a conversion and which enables the SDO pin when low. |
| 6 | SDO | output | Serial data output on which the conversion result is presented, synchronized to SCK. |
| 7 | SCK | input | Serial data clock input which, while CNV is low, shifts the conversion result out on SDO. |
| 8 | VDD | power_in | Power supply, specified from 2.7 V to 5.25 V with respect to GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Data Converters |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute Input Voltage IN+ | | -0.1 | | | V | | 3 |
| Absolute Input Voltage IN− | | -0.1 | | 0.1 | V | | 3 |
| Leakage Current at 25°C | | | | 1 | nA | Acquisition phase | 3 |
| No Missing Codes | | 16 | | | Bits | | 3 |
| Integral Linearity Error | | -4 | | 4 | LSB | | 3 |
| Gain Error | | -15 | 2 | 15 | LSB | TMIN to TMAX | 3 |
| Gain Error Temperature Drift | | -0.3 | | 0.3 | ppm/°C | | 3 |
| Offset Error | | -3.5 | 0.7 | 3.5 | mV | TMIN to TMAX | 3 |
| Offset Temperature Drift | | -0.3 | | 0.3 | ppm/°C | | 3 |
| Conversion Rate | | 0 | | 250 | kSPS | VDD = 4.75 V to 5.25 V | 3 |
| Conversion Rate | | 0 | | 150 | kSPS | VDD = 2.7 V to 4.75 V | 3 |
| VIL | VIL | | | 0.8 | V | VDD = 4.75 V | 4 |
| VIL | VIL | | | 0.45 | V | VDD = 2.7 V | 4 |
| VIH | VIH | 3.15 | | | V | VDD = 5.25 V | 4 |
| VIH | VIH | 1.9 | | | V | VDD = 3.3 V | 4 |
| Input Leakage Current Low | IIL | -1 | | 1 | µA | | 4 |
| Input Leakage Current High | IIH | -1 | | 1 | µA | | 4 |
| VOL | VOL | | | 0.4 | V | ISINK = +500 µA | 4 |
| Supply Voltage VDD | VDD | 2.7 | | 5.25 | V | Specified performance | 4 |
| Operating Current | | | 0.8 | 1.2 | mA | VDD = 5 V, 100 kSPS throughput | 4 |
| Operating Current | | | 540 | 960 | µA | VDD = 2.7 V, 100 kSPS throughput | 4 |
| Standby Current | | | 1 | 50 | nA | VDD = 5 V, 25°C | 4 |
| Reference Voltage Range | | 1 | | | V | | 4 |
| Load Current | | | | 50 | µA | 250 kSPS, VIN+ − VIN− = VREF/2 = 2.5 V | 4 |
| Specified Performance Temperature Range | TMIN to TMAX | -40 | | 85 | °C | | 4 |
| Conversion Time: CNV Rising Edge to Data Available | tCONV | | 3.2 | | µs | VDD = 4.75 V to 5.25 V | 5 |
| Time Between Conversions | tCYC | | 4 | | µs | VDD = 4.75 V to 5.25 V | 5 |
| SCK Period | tSCK | | 50 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| SCK Low Time | tSCKL | | 20 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| SCK High Time | tSCKH | | 20 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| SCK Falling Edge to Data Remains Valid | tHSDO | | 5 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| SCK Falling Edge to Data Valid Delay | tDSDO | | 20 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| CNV Low to SDO, D15 MSB Valid | tEN | | 60 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| CNV High to SDO High Impedance | tDIS | | 60 | | ns | VDD = 4.75 V to 5.25 V | 5 |
| Conversion Time: CNV Rising Edge to Data Available | tCONV | | 4.66 | | µs | VDD = 2.7 V to 4.75 V | 5 |
| Time Between Conversions | tCYC | | 6.66 | | µs | VDD = 2.7 V to 4.75 V | 5 |
| SCK Period | tSCK | | 125 | | ns | VDD = 2.7 V to 4.75 V | 5 |
| SCK Low Time | tSCKL | | 50 | | ns | VDD = 2.7 V to 4.75 V | 5 |
| SCK High Time | tSCKH | | 50 | | ns | VDD = 2.7 V to 4.75 V | 5 |
| SCK Falling Edge to Data Valid Delay | tDSDO | | 50 | | ns | VDD = 2.7 V to 4.75 V | 5 |
| CNV Low to SDO, D15 MSB Valid | tEN | | 120 | | ns | VDD = 2.7 V to 4.75 V | 5 |
| CNV High to SDO High Impedance | tDIS | | 120 | | ns | VDD = 2.7 V to 4.75 V | 5 |
| VDD to GND | VDD | -0.3 | | 7 | V | | 6 |
| Analog Inputs IN+, IN− current | | -130 | | 130 | mA | Input current, or GND − 0.3 V to VDD + 0.3 V voltage rating | 6 |
| Storage Temperature Range | | -65 | | 150 | °C | | 6 |
| Junction Temperature | | | | 150 | °C | | 6 |
| Lead Temperature, Vapor Phase | | | | 215 | °C | 60 sec | 6 |
| Lead Temperature, Infrared | | | | 220 | °C | 15 sec | 6 |
| Thermal Impedance Junction-to-Ambient | θJA | | 200 | | °C/W | MSOP-8 | 6 |
| Thermal Impedance Junction-to-Case | θJC | | 44 | | °C/W | MSOP-8 | 6 |
## CAD (KiCad official)
- Symbol: `AD7694BRMZ`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `ad7694brmz-etched.step` / `ad7694brmz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7694brmz.step` / `ad7694brmz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD7694.pdf) (16 pp, sha256 `be5fe9921dea801f`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad7694brmz-datasheet.pdf)