component

AD7691BRMZ

Public Made by Adom

by adom

Analog Devices Analog To Digital Converters (ADCs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersad7691brmzfactory-2.0.0extractor-text

Verified AD7691BRMZ

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 10 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD7691BRMZ · MSOP-10 · 10 pins
  • ✓copper: 10 copper pads, none touching another net
  • ✓datasheet: all 10 pin names found in the 28-page datasheet
  • ✓distributor: lcsc C31331, digikey 505-AD7691BRMZ-ND, mouser 584-AD7691BRMZ
  • ✓family: MSOP-10_3x3mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-nz8jpda4/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.25)
  • ✓pads: 10 pins = 10 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 10 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad7691brmz.kicad_sym✓ ad7691brmz.kicad_mod✓ ad7691brmz.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
ad7691brmz / README.md
History Download
Ray Publish 0.1.0 8b2e99f 2d ago

AD7691BRMZ

Analog Devices · Analog To Digital Converters (ADCs) · MSOP-10

AD7691BRMZ from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input voltage with a range from 0.5 V to VDD, referred to GND and to be decoupled closely with a 10 µF capacitor.
2 VDD power_in Power supply, 2.3 V to 5 V nominal operation (specified 2.3 V to 5.25 V).
3 IN+ input Differential positive analog input referenced to IN−, ranging between 0 V and VREF centered about VREF/2 and driven 180° out of phase with IN−.
4 IN− input Differential negative analog input referenced to IN+, ranging between 0 V and VREF centered about VREF/2 and driven 180° out of phase with IN+.
5 GND power_in Power supply ground.
6 CNV input Convert input whose leading edge initiates conversion and selects chain or CS mode, enabling SDO when low in CS mode.
7 SDO output Serial data output carrying the conversion result, synchronized to SCK.
8 SCK input Serial data clock input that shifts out the conversion result when the part is selected.
9 SDI input Serial data input that selects chain mode if low at the CNV rising edge or CS mode if high, and serves as the daisy-chain data input with an 18 SCK cycle delay to SDO.
10 VIO power_in Input/output interface digital power, nominally at the host interface supply (1.8 V, 2.5 V, 3 V, or 5 V).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category Data Converters
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resolution 18 Bits 3
Analog Input Voltage Range VIN 0 V IN+ − (IN−): −VREF to +VREF 3
Absolute Input Voltage -0.1 0.1 V IN+, IN−; −0.1 V to VREF + 0.1 V 3
Common-Mode Input Range -0.1 0.1 V IN+, IN−; VREF/2 −0.1 to VREF/2 +0.1 V 3
Analog Input CMRR 65 dB fIN = 250 kHz 3
Leakage Current at 25°C 1 nA Acquisition phase 3
Conversion Rate 0 250 kSPS VDD = 4.5 V to 5.25 V 3
Conversion Rate 0 180 kSPS VDD = 2.3 V to 4.5 V 3
Transient Response 1.8 µs Full-scale step 3
No Missing Codes 18 Bits 3
Integral Linearity Error INL -1.5 0.75 1.5 LSB typ is ±0.75 3
Differential Linearity Error DNL -1 0.5 1.25 LSB typ is ±0.5 3
Transition Noise 0.75 LSB REF = VDD = 5 V 3
Gain Error -40 2 40 LSB VDD = 4.5 V to 5.25 V; typ is ±2 3
Gain Error -80 2 80 LSB VDD = 2.3 V to 4.5 V; typ is ±2 3
Gain Error Temperature Drift 0.3 ppm/°C typ is ±0.3 3
Zero Error -0.8 0.1 0.8 mV VDD = 4.5 V to 5.25 V; typ is ±0.1 3
Zero Error -3.5 0.7 3.5 mV VDD = 2.3 V to 4.5 V; typ is ±0.7 3
Zero Temperature Drift 0.3 ppm/°C typ is ±0.3 3
Power Supply Sensitivity 0.25 LSB VDD = 5 V ± 5%; typ is ±0.25 3
Dynamic Range 101 102 dB VREF = 5 V 3
Oversampled Dynamic Range 125 dB fIN = 1 kSPS 3
Signal-to-Noise SNR 100 101.5 dB fIN = 1 kHz, VREF = 5 V 3
Signal-to-Noise SNR 95 96.5 dB fIN = 1 kHz, VREF = 2.5 V 3
Spurious-Free Dynamic Range SFDR -125 dB fIN = 1 kHz, VREF = 5 V 3
Total Harmonic Distortion THD -125 -118 dB fIN = 1 kHz, VREF = 5 V 3
Signal-to-(Noise + Distortion) SINAD 100 101.5 dB fIN = 1 kHz, VREF = 5 V 3
Signal-to-(Noise + Distortion) SINAD 95 96.5 dB fIN = 1 kHz, VREF = 2.5 V 3
Intermodulation Distortion 115 dB fIN1 = 21.4 kHz, fIN2 = 18.9 kHz, each tone −7 dB below full scale 3
Conversion Time tCONV 0.5 3.7 µs VDD = 2.3 V to 4.5 V; CNV rising edge to data available 6
Acquisition Time tACQ 1.8 µs VDD = 2.3 V to 4.5 V 6
Time Between Conversions tCYC 5.5 µs VDD = 2.3 V to 4.5 V 6
CNV Pulse Width (CS Mode) tCNVH 10 ns VDD = 2.3 V to 4.5 V 6
SCK Period (CS Mode) tSCK 25 ns VDD = 2.3 V to 4.5 V 6
SCK Period (Chain Mode) tSCK 29 ns VIO Above 3 V 6
SCK Period (Chain Mode) tSCK 35 ns VIO Above 2.7 V 6
SCK Period (Chain Mode) tSCK 40 ns VIO Above 2.3 V 6
SCK Low Time tSCKL 12 ns VDD = 2.3 V to 4.5 V 6
SCK High Time tSCKH 12 ns VDD = 2.3 V to 4.5 V 6
SCK Falling Edge to Data Remains Valid tHSDO 5 ns VDD = 2.3 V to 4.5 V 6
SCK Falling Edge to Data Valid Delay tDSDO 24 ns VIO Above 3 V 6
SCK Falling Edge to Data Valid Delay tDSDO 30 ns VIO Above 2.7 V 6
SCK Falling Edge to Data Valid Delay tDSDO 35 ns VIO Above 2.3 V 6
CNV or SDI Low to SDO D17 MSB Valid (CS Mode) tEN 18 ns VIO Above 2.7 V 6
CNV or SDI Low to SDO D17 MSB Valid (CS Mode) tEN 22 ns VIO Above 2.3 V 6
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode) tDIS 25 ns 6
SDI Valid Setup Time from CNV Rising Edge (CS Mode) tSSDICNV 30 ns 6
SDI Valid Hold Time from CNV Rising Edge (CS Mode) tHSDICNV 0 ns 6
SCK Valid Setup Time from CNV Rising Edge (Chain Mode) tSSCKCNV 5 ns 6
SCK Valid Hold Time from CNV Rising Edge (Chain Mode) tHSCKCNV 8 ns 6
SDI Valid Setup Time from SCK Falling Edge (Chain Mode) tSSDISCK 8 ns 6
SDI Valid Hold Time from SCK Falling Edge (Chain Mode) tHSDISCK 10 ns 6
SDI High to SDO High (Chain Mode with Busy Indicator) tDSDOSDI 36 ns 6
Analog Inputs (IN+, IN−) and REF Voltage -0.3 V GND − 0.3 V to VDD + 0.3 V or ±130 mA 7
Supply Voltage VDD, VIO to GND -0.3 7 V −0.3 V to +7 V 7
VDD to VIO -7 7 V ±7 V 7
Digital Inputs to GND -0.3 V −0.3 V to VIO + 0.3 V 7
Digital Outputs to GND -0.3 V −0.3 V to VIO + 0.3 V 7
Storage Temperature Range -65 150 °C 7
Junction Temperature 150 °C 7
Thermal Resistance Junction to Ambient θJA 200 °C/W 10-Lead MSOP 7
Thermal Resistance Junction to Case θJC 44 °C/W 10-Lead MSOP 7

CAD (KiCad official)

  • Symbol: AD7691BRMZ
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad7691brmz-etched.step / ad7691brmz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7691brmz.step / ad7691brmz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 59c741beaa3a6250, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF