main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers ad7686crmz: viewers · Ray 5d ago
ad7686crmz-etched.glb Publish 0.1.0 · Ray 5d ago
ad7686crmz-etched.step ad7686crmz: factory component page (tier=mfr) · Ray 5d ago
ad7686crmz-hero.glb ad7686crmz: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
ad7686crmz-hero.overlay.json Publish 0.1.0 · Ray 5d ago
ad7686crmz.glb Publish 0.1.0 · Ray 5d ago
ad7686crmz.kicad_mod Publish 0.1.0 · Ray 5d ago
ad7686crmz.kicad_sym Publish 0.1.0 · Ray 5d ago
ad7686crmz.lbr Publish 0.1.0 · Ray 5d ago
ad7686crmz.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago

AD7686CRMZ

Analog Devices · Analog To Digital Converters (ADC) · MSOP-10

AD7686CRMZ from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input voltage with a range from 0.5 V to VDD, referred to GND, and to be decoupled closely with a 10 µF capacitor.
2 VDD power_in Power supply pin, specified for operation from 4.5 V to 5.5 V in the Specifications table.
3 IN+ input Analog input referred to IN−, with a differential voltage range of 0 V to VREF.
4 IN− input Analog input ground sense, connected to the analog ground plane or to a remote sense ground.
5 GND power_in Power supply ground pin.
6 CNV input Convert input that initiates conversions on its leading edge, selects chain or CS interface mode, and enables SDO in CS mode when low.
7 SDO output Serial data output carrying the conversion result, synchronized to SCK.
8 SCK input Serial data clock input that shifts the conversion result out when the part is selected.
9 SDI input Serial data input that selects the interface mode: low at the CNV rising edge selects chain mode and high selects CS mode.
10 VIO power_in Input/output interface digital power, nominally at the host interface supply of 1.8 V, 2.5 V, 3 V, or 5 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category Data Acquisition
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Differential Linearity Error DNL -1 0.5 1.5 LSB C grade 3
Integral Linearity Error INL -2 0.6 2 LSB C grade 3
Gain Error, TMIN to TMAX -6 2 6 LSB TMIN to TMAX, C grade 3
Gain Error Temperature Drift -0.3 0.3 ppm/°C 3
Offset Error, TMIN to TMAX -1.6 0.1 1.6 mV TMIN to TMAX 3
Offset Temperature Drift -0.3 0.3 ppm/°C 3
Power Supply Sensitivity -0.05 0.05 LSB VDD = 5 V ± 5% 3
Conversion Rate 0 500 kSPS 3
Transient Response 400 ns Full-scale step 3
Analog Input CMRR 65 dB fIN = 200 kHz 3
Absolute Input Voltage IN+ -0.1 V Upper limit VDD + 0.1 V 3
Absolute Input Voltage IN− -0.1 0.1 V 3
Voltage Range IN+ − IN− 0 V Upper limit VREF 3
Signal-to-(Noise + Distortion) SINAD 91 92.5 dB fIN = 20 kHz, VREF = 5 V, C grade 3
Signal-to-Noise Ratio SNR 91 92.7 dB fIN = 20 kHz, VREF = 5 V, C grade 3
Intermodulation Distortion -115 dB C grade 3
Standby current 1 nA Standby, per Features section 1
Reference Input Voltage REF REF 0.5 V Upper limit VDD, referred to GND 7
Supply Voltage VDD VDD 4.5 5.5 V 3
Interface Supply VIO VIO 2.3 V Lower limit 2.3 V, upper limit VDD 3
Operating Temperature Range TA -40 85 °C 3
Supply Voltages VDD, VIO to GND -0.3 7 V 6
VDD to VIO -7 7 V 6
Digital Inputs to GND -0.3 V Upper limit VIO + 0.3 V 6
Digital Outputs to GND -0.3 V Upper limit VIO + 0.3 V 6
Storage Temperature Range -65 150 °C 6
Junction Temperature 150 °C 6
θJA Thermal Impedance θJA 200 °C/W MSOP-10 6
θJC Thermal Impedance θJC 44 °C/W MSOP-10 6
Conversion Time: CNV Rising Edge to Data Available tCONV 0.5 1.6 µs 5
Acquisition Time tACQ 400 ns 5
Time Between Conversions tCYC 2 µs 5
CNV Pulse Width (CS Mode) tCNVH 10 ns CS Mode 5
SCK Period (CS Mode) tSCK 15 ns CS Mode 5
SCK Low Time tSCKL 7 ns 5
SCK High Time tSCKH 7 ns 5
SCK Falling Edge to Data Remains Valid tHSDO 5 ns 5
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode) tDIS 25 ns CS Mode 5
SDI Valid Setup Time from CNV Rising Edge (CS Mode) tSSDICNV 15 ns CS Mode 5
SDI Valid Hold Time from CNV Rising Edge (CS Mode) tHSDICNV 0 ns CS Mode 5

CAD (KiCad official)

  • Symbol: AD7686CRMZ
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad7686crmz-etched.step / ad7686crmz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7686crmz.step / ad7686crmz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 0945d9180c9bb92d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF