# AD7686BRMZRL7

**Analog Devices** · Analog To Digital Converters (ADCs) · MSOP-10

AD7686BRMZRL7 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | input | Reference input voltage with range 0.5 V to VDD, referred to GND, and should be decoupled closely to the pin with a 10 µF capacitor. |
| 2 | VDD | power_in | Power supply. |
| 3 | IN+ | input | Analog input referred to IN−, with voltage range (IN+ minus IN−) of 0 V to VREF. |
| 4 | IN− | input | Analog input ground sense, connected to the analog ground plane or to a remote sense ground. |
| 5 | GND | power_in | Power supply ground. |
| 6 | CNV | input | Convert input whose leading edge initiates conversion and selects chain or CS interface mode; in CS mode it enables SDO when low, and in chain mode data should be read when CNV is high. |
| 7 | SDO | output | Serial data output carrying the conversion result, synchronized to SCK. |
| 8 | SCK | input | Serial data clock input that shifts out the conversion result when the part is selected. |
| 9 | SDI | input | Serial data input that selects chain mode if low at CNV rising edge (daisy-chain data input, output on SDO after 16 SCK cycles) or CS mode if high, where SDI or CNV low enables the serial output. |
| 10 | VIO | power_in | Input/output interface digital power, nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V, or 5 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Data Converters |
| Pins | 10 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resolution |  |  | 16 |  | Bits |  | 3 |
| Absolute Input Voltage IN+ |  | -0.1 |  | 0.1 | V | IN+; max printed as VDD + 0.1 (max field holds 0.1 offset only) | 3 |
| Absolute Input Voltage IN− |  | -0.1 |  | 0.1 | V | IN− | 3 |
| No Missing Codes |  | 16 |  |  | Bits |  | 3 |
| Differential Linearity Error | DNL | -1 | 0.7 |  | LSB |  | 3 |
| Integral Linearity Error | INL | -3 | 1 | 3 | LSB |  | 3 |
| Gain Error |  | -8 | 2 | 8 | LSB | TMIN to TMAX | 3 |
| Offset Error |  | -1.6 | 0.1 | 1.6 | mV | TMIN to TMAX | 3 |
| Conversion Rate |  | 0 |  | 500 | kSPS |  | 3 |
| Signal-to-Noise Ratio | SNR | 89 | 92 |  | dB | fIN = 20 kHz, VREF = 5 V | 3 |
| Signal-to-(Noise + Distortion) | SINAD | 89 | 92 |  | dB | fIN = 20 kHz, VREF = 5 V | 3 |
| Conversion Time | tCONV | 0.5 |  | 1.6 | µs | CNV rising edge to data available | 5 |
| Acquisition Time | tACQ | 400 |  |  | ns |  | 5 |
| Time Between Conversions | tCYC | 2 |  |  | µs |  | 5 |
| CNV Pulse Width | tCNVH | 10 |  |  | ns | CS mode | 5 |
| SCK Period (CS Mode) | tSCK | 15 |  |  | ns | CS mode | 5 |
| SCK Period (Chain Mode) | tSCK | 17 |  |  | ns | VIO above 4.5 V | 5 |
| SCK Low Time | tSCKL | 7 |  |  | ns |  | 5 |
| SCK High Time | tSCKH | 7 |  |  | ns |  | 5 |
| SCK Falling Edge to Data Remains Valid | tHSDO | 5 |  |  | ns |  | 5 |
| SCK Falling Edge to Data Valid Delay | tDSDO |  |  | 14 | ns | VIO above 4.5 V | 5 |
| CNV or SDI Low to SDO D15 MSB Valid | tEN |  |  | 15 | ns | CS mode, VIO above 4.5 V | 5 |
| CNV or SDI High or Last SCK Falling Edge to SDO High Impedance | tDIS |  |  | 25 | ns | CS mode | 5 |
| SDI Valid Setup Time from CNV Rising Edge | tSSDICNV | 15 |  |  | ns | CS mode | 5 |
| SDI Valid Hold Time from CNV Rising Edge | tHSDICNV | 0 |  |  | ns | CS mode | 5 |
| SCK Valid Setup Time from CNV Rising Edge | tSSCKCNV | 5 |  |  | ns | Chain mode | 5 |
| SCK Valid Hold Time from CNV Rising Edge | tHSCKCNV | 5 |  |  | ns | Chain mode | 5 |
| SDI Valid Setup Time from SCK Falling Edge | tSSDISCK | 3 |  |  | ns | Chain mode | 5 |
| SDI Valid Hold Time from SCK Falling Edge | tHSDISCK | 4 |  |  | ns | Chain mode | 5 |
| SDI High to SDO High | tDSDOSDI |  |  | 15 | ns | Chain mode with busy indicator, VIO above 4.5 V | 5 |
| Supply Voltage VDD, VIO to GND |  | -0.3 |  | 7 | V |  | 6 |
| VDD to VIO |  | -7 |  | 7 | V |  | 6 |
| Analog Inputs IN+, IN− |  | -0.3 |  | 0.3 | V | GND − 0.3 V to VDD + 0.3 V or ±130 mA (max is the +0.3 offset above VDD) | 6 |
| REF |  | -0.3 |  | 0.3 | V | GND − 0.3 V to VDD + 0.3 V (max is the +0.3 offset above VDD) | 6 |
| Digital Inputs to GND |  | -0.3 |  | 0.3 | V | −0.3 V to VIO + 0.3 V (max is the +0.3 offset above VIO) | 6 |
| Digital Outputs to GND |  | -0.3 |  | 0.3 | V | −0.3 V to VIO + 0.3 V (max is the +0.3 offset above VIO) | 6 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 6 |
| Junction Temperature |  |  |  | 150 | °C |  | 6 |
| Thermal Impedance θJA | θJA |  | 200 |  | °C/W | MSOP-10 | 6 |
| Thermal Impedance θJC | θJC |  | 44 |  | °C/W | MSOP-10 | 6 |
| Transition Noise |  |  | 0.5 |  | LSB | REF = VDD = 5 V | 3 |
| Gain Error Temperature Drift |  |  | 0.3 |  | ppm/°C |  | 3 |
| Offset Temperature Drift |  |  | 0.3 |  | ppm/°C |  | 3 |
| Power Supply Sensitivity |  |  | 0.05 |  | LSB | VDD = 5 V ± 5% | 3 |
| Transient Response |  |  | 400 |  | ns | Full-scale step | 3 |
| Analog Input CMRR |  |  | 65 |  | dB | fIN = 200 kHz | 3 |
| Leakage Current |  |  | 1 |  | nA | Acquisition phase, 25°C | 3 |

## CAD (KiCad official)

- Symbol: `AD7686BRMZRL7`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `ad7686brmzrl7-etched.step` / `ad7686brmzrl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7686brmzrl7.step` / `ad7686brmzrl7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD7686.pdf) (28 pp, sha256 `0945d9180c9bb92d`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad7686brmzrl7-datasheet.pdf)