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AD7682BCPZRL7
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADC), LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD7682BCPZRL7
Analog Devices · Analog To Digital Converters (ADC) · LFCSP-20(4x4)
AD7682BCPZRL7 from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply, nominally 2.5 V to 5.5 V with an external reference, decoupled with 10 µF and 100 nF capacitors; minimum 3.0 V when using the internal 2.5 V reference and 4.5 V when using the internal 4.096 V reference. |
| 2 | REF | bidirectional | Reference input/output: produces a selectable 2.5 V or 4.096 V system reference when the internal reference is enabled, or accepts a precision reference from 0.5 V to VDD for improved drift; needs a 10 µF decoupling capacitor placed as close to REF as possible. |
| 3 | REFIN | bidirectional | Internal reference output/reference buffer input: requires 0.1 µF decoupling when the internal reference is used, and a buffered source between 0.5 V and (VDD − 0.5 V) when the internal reference buffer is used. |
| 4 | GND | power_in | Power supply ground. |
| 5 | GND | power_in | Power supply ground. |
| 6 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN4 on the AD7689). |
| 7 | IN2 | input | Analog input channel 2 on the AD7682 (channel 5 on the AD7689). |
| 8 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN6 on the AD7689). |
| 9 | IN3 | input | Analog input channel 3 on the AD7682 (channel 7 on the AD7689). |
| 10 | COM | input | Common channel input; all input channels IN[7:0] can be referenced to a common-mode point of 0 V or VREF/2 V. |
| 11 | CNV | input | Conversion input: a rising edge initiates the conversion, and holding CNV low during conversion enables the busy indicator. |
| 12 | DIN | input | Data input used to write the 14-bit configuration register, which can be written during and after conversion. |
| 13 | SCK | input | Serial data clock input that clocks data out on SDO and data in on DIN, MSB first. |
| 14 | SDO | output | Serial data output, synchronized to SCK; conversion results are straight binary in unipolar modes and twos complement in bipolar modes. |
| 15 | VIO | power_in | Input/output interface digital power, nominally at the host interface supply of 1.8 V, 2.5 V, 3 V, or 5 V. |
| 16 | IN0 | input | Analog input channel 0. |
| 17 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN1 on the AD7689). |
| 18 | IN1 | input | Analog input channel 1 on the AD7682 (channel 2 on the AD7689). |
| 19 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN3 on the AD7689). |
| 20 | VDD | power_in | Power supply, nominally 2.5 V to 5.5 V with an external reference, decoupled with 10 µF and 100 nF capacitors; minimum 3.0 V with the internal 2.5 V reference and 4.5 V with the internal 4.096 V reference. |
| 21 | EPAD | passive | Exposed pad, not connected internally; for increased solder joint reliability it is recommended to solder it to the system ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LFCSP-20(4x4) |
| Category | Data Acquisition |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Negative or COM input voltage, unipolar mode | -0.1 | 0.1 | V | Negative or COM input, unipolar mode | 3 | ||
| Absolute input voltage, positive input | -0.1 | V | Positive input, unipolar and bipolar modes; maximum printed as VREF + 0.1 V | 3 | |||
| Voltage range, unipolar mode | 0 | V | Unipolar mode; maximum printed as +VREF | 3 | |||
| Conversion rate, full bandwidth | 0 | 250 | kSPS | Full bandwidth, VDD = 4.5 V to 5.5 V | 3 | ||
| Conversion rate, full bandwidth | 0 | 200 | kSPS | Full bandwidth, VDD = 2.3 V to 4.5 V | 3 | ||
| Conversion rate, 1/4 bandwidth | 0 | 62.5 | kSPS | 1/4 bandwidth, VDD = 4.5 V to 5.5 V | 3 | ||
| Conversion rate, 1/4 bandwidth | 0 | 50 | kSPS | 1/4 bandwidth, VDD = 2.3 V to 4.5 V | 3 | ||
| Transient response, full-scale step | 1.8 | µs | Full-scale step, full bandwidth | 3 | |||
| Transient response, full-scale step | 14.5 | µs | Full-scale step, 1/4 bandwidth | 3 | |||
| No missing codes | 16 | Bits | 3 | ||||
| Integral linearity error | INL | -1.5 | 0.4 | 1.5 | LSB | 3 | |
| Differential linearity error | DNL | -1 | 0.25 | 1.5 | LSB | 3 | |
| Gain error | -8 | 1 | 8 | LSB | 3 | ||
| Gain error match | -4 | 0.5 | 4 | LSB | 3 | ||
| Offset error | -8 | 1 | 8 | LSB | VDD = 4.5 V to 5.5 V | 3 | |
| Offset error | -5 | 5 | LSB | VDD = 2.3 V to 4.5 V (printed ±5 LSB) | 3 | ||
| Offset error match | -4 | 0.5 | 4 | LSB | 3 | ||
| Power supply sensitivity | -1.5 | 1.5 | LSB | VDD = 5 V ± 5% (printed ±1.5 LSB) | 3 | ||
| Dynamic range | 90.5 | 93.8 | dB | 3 | |||
| Supply voltages VDD, VIO to GND | VDD, VIO | -0.3 | 7 | V | To GND | 10 | |
| VIO to VDD | VIO | -0.3 | V | Maximum printed as VDD + 0.3 V | 10 | ||
| DIN, CNV, SCK to GND | -0.3 | V | To GND; maximum printed as VIO + 0.3 V | 10 | |||
| SDO to GND | -0.3 | V | To GND; maximum printed as VIO + 0.3 V | 10 | |||
| REF, REFIN voltage | -0.3 | V | Relative to GND; maximum printed as VDD + 0.3 V | 10 | |||
| Analog input current INx | -130 | 130 | mA | INx, COM (printed ±130 mA) | 10 | ||
| Storage temperature range | -65 | 150 | °C | 10 | |||
| Junction temperature | 150 | °C | 10 | ||||
| Thermal impedance, junction-to-ambient (LFCSP) | θJA | 48 | °C/W | LFCSP | 10 | ||
| Thermal impedance, junction-to-case (LFCSP) | θJC | 4.4 | °C/W | LFCSP | 10 | ||
| Supply voltage VDD | VDD | 2.3 | 5.5 | V | VIO = 1.8 V to VDD, reference voltage = VDD | 3 | |
| Interface supply VIO | VIO | 1.8 | V | Maximum is VDD | 3 | ||
| Operating temperature range | TA | -40 | 85 | °C | All specifications, unless otherwise noted (standard grade) | 3 |
CAD (KiCad official)
- Symbol:
AD7682BCPZRL7 - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
- 3D model files:
ad7682bcpzrl7-etched.step/ad7682bcpzrl7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7682bcpzrl7.step/ad7682bcpzrl7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (37 pp, sha256
028312fc80ae8a4b, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD7682BCPZRL7
**Analog Devices** · Analog To Digital Converters (ADC) · LFCSP-20(4x4)
AD7682BCPZRL7 from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply, nominally 2.5 V to 5.5 V with an external reference, decoupled with 10 µF and 100 nF capacitors; minimum 3.0 V when using the internal 2.5 V reference and 4.5 V when using the internal 4.096 V reference. |
| 2 | REF | bidirectional | Reference input/output: produces a selectable 2.5 V or 4.096 V system reference when the internal reference is enabled, or accepts a precision reference from 0.5 V to VDD for improved drift; needs a 10 µF decoupling capacitor placed as close to REF as possible. |
| 3 | REFIN | bidirectional | Internal reference output/reference buffer input: requires 0.1 µF decoupling when the internal reference is used, and a buffered source between 0.5 V and (VDD − 0.5 V) when the internal reference buffer is used. |
| 4 | GND | power_in | Power supply ground. |
| 5 | GND | power_in | Power supply ground. |
| 6 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN4 on the AD7689). |
| 7 | IN2 | input | Analog input channel 2 on the AD7682 (channel 5 on the AD7689). |
| 8 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN6 on the AD7689). |
| 9 | IN3 | input | Analog input channel 3 on the AD7682 (channel 7 on the AD7689). |
| 10 | COM | input | Common channel input; all input channels IN[7:0] can be referenced to a common-mode point of 0 V or VREF/2 V. |
| 11 | CNV | input | Conversion input: a rising edge initiates the conversion, and holding CNV low during conversion enables the busy indicator. |
| 12 | DIN | input | Data input used to write the 14-bit configuration register, which can be written during and after conversion. |
| 13 | SCK | input | Serial data clock input that clocks data out on SDO and data in on DIN, MSB first. |
| 14 | SDO | output | Serial data output, synchronized to SCK; conversion results are straight binary in unipolar modes and twos complement in bipolar modes. |
| 15 | VIO | power_in | Input/output interface digital power, nominally at the host interface supply of 1.8 V, 2.5 V, 3 V, or 5 V. |
| 16 | IN0 | input | Analog input channel 0. |
| 17 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN1 on the AD7689). |
| 18 | IN1 | input | Analog input channel 1 on the AD7682 (channel 2 on the AD7689). |
| 19 | NC | unconnected | No internal connection on the AD7682 (this pin is analog input IN3 on the AD7689). |
| 20 | VDD | power_in | Power supply, nominally 2.5 V to 5.5 V with an external reference, decoupled with 10 µF and 100 nF capacitors; minimum 3.0 V with the internal 2.5 V reference and 4.5 V with the internal 4.096 V reference. |
| 21 | EPAD | passive | Exposed pad, not connected internally; for increased solder joint reliability it is recommended to solder it to the system ground plane. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LFCSP-20(4x4) |
| Category | Data Acquisition |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Negative or COM input voltage, unipolar mode | | -0.1 | | 0.1 | V | Negative or COM input, unipolar mode | 3 |
| Absolute input voltage, positive input | | -0.1 | | | V | Positive input, unipolar and bipolar modes; maximum printed as VREF + 0.1 V | 3 |
| Voltage range, unipolar mode | | 0 | | | V | Unipolar mode; maximum printed as +VREF | 3 |
| Conversion rate, full bandwidth | | 0 | | 250 | kSPS | Full bandwidth, VDD = 4.5 V to 5.5 V | 3 |
| Conversion rate, full bandwidth | | 0 | | 200 | kSPS | Full bandwidth, VDD = 2.3 V to 4.5 V | 3 |
| Conversion rate, 1/4 bandwidth | | 0 | | 62.5 | kSPS | 1/4 bandwidth, VDD = 4.5 V to 5.5 V | 3 |
| Conversion rate, 1/4 bandwidth | | 0 | | 50 | kSPS | 1/4 bandwidth, VDD = 2.3 V to 4.5 V | 3 |
| Transient response, full-scale step | | | | 1.8 | µs | Full-scale step, full bandwidth | 3 |
| Transient response, full-scale step | | | | 14.5 | µs | Full-scale step, 1/4 bandwidth | 3 |
| No missing codes | | 16 | | | Bits | | 3 |
| Integral linearity error | INL | -1.5 | 0.4 | 1.5 | LSB | | 3 |
| Differential linearity error | DNL | -1 | 0.25 | 1.5 | LSB | | 3 |
| Gain error | | -8 | 1 | 8 | LSB | | 3 |
| Gain error match | | -4 | 0.5 | 4 | LSB | | 3 |
| Offset error | | -8 | 1 | 8 | LSB | VDD = 4.5 V to 5.5 V | 3 |
| Offset error | | -5 | | 5 | LSB | VDD = 2.3 V to 4.5 V (printed ±5 LSB) | 3 |
| Offset error match | | -4 | 0.5 | 4 | LSB | | 3 |
| Power supply sensitivity | | -1.5 | | 1.5 | LSB | VDD = 5 V ± 5% (printed ±1.5 LSB) | 3 |
| Dynamic range | | 90.5 | 93.8 | | dB | | 3 |
| Supply voltages VDD, VIO to GND | VDD, VIO | -0.3 | | 7 | V | To GND | 10 |
| VIO to VDD | VIO | -0.3 | | | V | Maximum printed as VDD + 0.3 V | 10 |
| DIN, CNV, SCK to GND | | -0.3 | | | V | To GND; maximum printed as VIO + 0.3 V | 10 |
| SDO to GND | | -0.3 | | | V | To GND; maximum printed as VIO + 0.3 V | 10 |
| REF, REFIN voltage | | -0.3 | | | V | Relative to GND; maximum printed as VDD + 0.3 V | 10 |
| Analog input current INx | | -130 | | 130 | mA | INx, COM (printed ±130 mA) | 10 |
| Storage temperature range | | -65 | | 150 | °C | | 10 |
| Junction temperature | | | | 150 | °C | | 10 |
| Thermal impedance, junction-to-ambient (LFCSP) | θJA | | 48 | | °C/W | LFCSP | 10 |
| Thermal impedance, junction-to-case (LFCSP) | θJC | | 4.4 | | °C/W | LFCSP | 10 |
| Supply voltage VDD | VDD | 2.3 | | 5.5 | V | VIO = 1.8 V to VDD, reference voltage = VDD | 3 |
| Interface supply VIO | VIO | 1.8 | | | V | Maximum is VDD | 3 |
| Operating temperature range | TA | -40 | | 85 | °C | All specifications, unless otherwise noted (standard grade) | 3 |
## CAD (KiCad official)
- Symbol: `AD7682BCPZRL7`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm`
- 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
- 3D model files: `ad7682bcpzrl7-etched.step` / `ad7682bcpzrl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad7682bcpzrl7.step` / `ad7682bcpzrl7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886007639396352) (37 pp, sha256 `028312fc80ae8a4b`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad7682bcpzrl7-datasheet.pdf)