AD7622BSTZ

{
  "schema_version": 1,
  "type": "component",
  "slug": "ad7622bstz",
  "title": "AD7622BSTZ",
  "brief": "Analog Devices Analog To Digital Converters (ADCs), LQFP-48(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "analog ics",
    "ad7622bstz"
  ],
  "component": {
    "mpn": "AD7622BSTZ",
    "manufacturer": "Analog Devices",
    "package": "LQFP-48(7x7)",
    "pin_count": 48,
    "category": "Analog ICs",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885740721197056",
    "parts": {
      "symbol": "ad7622bstz.kicad_sym",
      "footprint": "ad7622bstz.kicad_mod",
      "model_3d": "ad7622bstz-etched.glb",
      "model_3d_plain": "ad7622bstz.glb",
      "model_3d_step": "ad7622bstz-etched.step",
      "model_3d_step_plain": "ad7622bstz.step",
      "lbr": "ad7622bstz.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog power ground."
      },
      {
        "number": "2",
        "name": "AVDD",
        "type": "power_in",
        "description": "Input analog power pin. Nominally 2.5 V."
      },
      {
        "number": "3",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital power ground."
      },
      {
        "number": "4",
        "name": "BYTESWAP",
        "type": "input",
        "description": "Parallel mode selection (8-bit/16-bit). When high, LSB is output on D[15:8] and MSB is output on D[7:0]; when low, LSB is on D[7:0] and MSB is on D[15:8]."
      },
      {
        "number": "5",
        "name": "OB/2C",
        "type": "input",
        "description": "Straight binary/binary twos complement output select. High = straight binary; low = twos complement (MSB inverted)."
      },
      {
        "number": "6",
        "name": "WARP",
        "type": "input",
        "description": "Conversion mode selection. WARP=high with NORMAL=high selects wideband warp mode; WARP=high with NORMAL=low selects warp mode. Fastest modes; minimum conversion rate must be respected."
      },
      {
        "number": "7",
        "name": "NORMAL",
        "type": "input",
        "description": "Conversion mode selection (active low). When NORMAL=low and WARP=low, selects normal mode with full accuracy independent of the minimum conversion rate."
      },
      {
        "number": "8",
        "name": "SER/PAR",
        "type": "input",
        "description": "Serial/parallel interface selection input. High = serial mode; low = parallel port selected."
      },
      {
        "number": "9",
        "name": "D0",
        "type": "output",
        "description": "Bit 0 of the parallel port data output bus. Always an output regardless of interface mode."
      },
      {
        "number": "10",
        "name": "D1",
        "type": "output",
        "description": "Bit 1 of the parallel port data output bus. Always an output regardless of interface mode."
      },
      {
        "number": "11",
        "name": "D2/DIVSCLK[0]",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 2 of the data output bus. Serial mode (SER/PAR=high) with master serial read-after-convert (EXT/INT=low, RDC/SDIN=low): serial clock division select bit 0 used to slow the internally generated serial clock."
      },
      {
        "number": "12",
        "name": "D3/DIVSCLK[1]",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 3 of the data output bus. Serial master read-after-convert mode: serial clock division select bit 1."
      },
      {
        "number": "13",
        "name": "D4/EXT/INT",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 4 of the data output bus. Serial mode (SER/PAR=high): serial clock source select - low = master (internal SCLK), high = slave (external SCLK gated by CS)."
      },
      {
        "number": "14",
        "name": "D5/INVSYNC",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 5 of the data output bus. Serial master mode (EXT/INT=low): selects active state of SYNC - low = SYNC active high, high = SYNC active low."
      },
      {
        "number": "15",
        "name": "D6/INVSCLK",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 6 of the data output bus. Serial mode (SER/PAR=high): inverts the SCLK signal in all serial modes."
      },
      {
        "number": "16",
        "name": "D7/RDC/SDIN",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 7 of the data output bus. Serial master (EXT/INT=low): RDC selects read-during-convert (high) or read-after-convert (low) mode. Serial slave (EXT/INT=high): SDIN serial data input for daisy-chaining ADCs (16 SCLK delay)."
      },
      {
        "number": "17",
        "name": "OGND",
        "type": "power_in",
        "description": "Input/output interface digital power ground."
      },
      {
        "number": "18",
        "name": "OVDD",
        "type": "power_in",
        "description": "Input/output interface digital power. Nominally at the same supply as the host interface (2.5 V or 3 V, spec range 2.3 V to 3.6 V)."
      },
      {
        "number": "19",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital power. Nominally 2.5 V."
      },
      {
        "number": "20",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital power ground."
      },
      {
        "number": "21",
        "name": "D8/SDOUT",
        "type": "output",
        "description": "Parallel mode: Bit 8 of the data output bus. Serial mode (SER/PAR=high): serial data output synchronized to SCLK, MSB-first from an on-chip 16-bit shift register. Format set by OB/2C."
      },
      {
        "number": "22",
        "name": "D9/SCLK",
        "type": "bidirectional",
        "description": "Parallel mode: Bit 9 of the data output bus. Serial mode: serial data clock. Direction depends on EXT/INT (input in slave mode, output in master mode); active edge depends on INVSCLK."
      },
      {
        "number": "23",
        "name": "D10/SYNC",
        "type": "output",
        "description": "Parallel mode: Bit 10 of the data output bus. Serial master mode (EXT/INT=low): SYNC frame synchronization output for use with the internal data clock. Polarity set by INVSYNC."
      },
      {
        "number": "24",
        "name": "D11/RDERROR",
        "type": "output",
        "description": "Parallel mode: Bit 11 of the data output bus. Serial slave mode (EXT/INT=high): RDERROR read-error flag - pulsed high if a read is started but not completed when the next conversion completes (current data lost)."
      },
      {
        "number": "25",
        "name": "D12",
        "type": "output",
        "description": "Bit 12 of the parallel port data output bus. Always an output regardless of interface mode."
      },
      {
        "number": "26",
        "name": "D13",
        "type": "output",
        "description": "Bit 13 of the parallel port data output bus. Always an output regardless of interface mode."
      },
      {
        "number": "27",
        "name": "D14",
        "type": "output",
        "description": "Bit 14 of the parallel port data output bus. Always an output regardless of interface mode."
      },
      {
        "number": "28",
        "name": "D15",
        "type": "output",
        "description": "Bit 15 of the parallel port data output bus (MSB). Always an output regardless of interface mode."
      },
      {
        "number": "29",
        "name": "BUSY",
        "type": "output",
        "description": "Busy output. Transitions high when a conversion starts and remains high until the conversion is complete and data has been latched into the on-chip shift register. The falling edge of BUSY can be used as a data-ready clock signal."
      },
      {
        "number": "30",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital power ground."
      },
      {
        "number": "31",
        "name": "RD",
        "type": "input",
        "description": "Read data (active low). When CS and RD are both low, the parallel or serial output bus is enabled."
      },
      {
        "number": "32",
        "name": "CS",
        "type": "input",
        "description": "Chip select (active low). When CS and RD are both low, the parallel or serial output bus is enabled. Also used to gate the external clock in slave serial mode."
      },
      {
        "number": "33",
        "name": "RESET",
        "type": "input",
        "description": "Reset input (active high). When high, resets the AD7622 and aborts the current conversion. Falling edge enables calibration mode (BUSY pulses high). Tie to DGND if unused."
      },
      {
        "number": "34",
        "name": "PD",
        "type": "input",
        "description": "Power-down input. When high, powers down the ADC (2 µW typical). Conversions are inhibited after the current one completes."
      },
      {
        "number": "35",
        "name": "CNVST",
        "type": "input",
        "description": "Conversion start (active low). A falling edge on CNVST puts the internal sample-and-hold into hold and initiates a conversion."
      },
      {
        "number": "36",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog power ground."
      },
      {
        "number": "37",
        "name": "REF",
        "type": "bidirectional",
        "description": "Reference output/input. With PDREF/PDBUF=low, internal reference and buffer are enabled producing 2.048 V on this pin. With PDREF/PDBUF=high, they are disabled and an external reference (up to AVDD) can be applied here. Requires decoupling."
      },
      {
        "number": "38",
        "name": "REFGND",
        "type": "power_in",
        "description": "Reference input analog ground."
      },
      {
        "number": "39",
        "name": "IN-",
        "type": "input",
        "description": "Differential negative analog input. Voltage range VIN+ − VIN− is ±VREF; operating input voltage referenced to AGND is −0.1 V to AVDD (external reference) or −0.1 V to VREF (internal reference)."
      },
      {
        "number": "40",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect."
      },
      {
        "number": "41",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog power ground."
      },
      {
        "number": "42",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog power ground."
      },
      {
        "number": "43",
        "name": "IN+",
        "type": "input",
        "description": "Differential positive analog input."
      },
      {
        "number": "44",
        "name": "AVDD",
        "type": "power_in",
        "description": "Input analog power pin. Nominally 2.5 V."
      },
      {
        "number": "45",
        "name": "TEMP",
        "type": "output",
        "description": "Temperature sensor analog output. Nominally 278 mV @ 25°C with a temperature coefficient of 1 mV/°C. Output resistance ~4.7 kΩ."
      },
      {
        "number": "46",
        "name": "REFBUFIN",
        "type": "bidirectional",
        "description": "Internal reference output / reference buffer input. With PDREF/PDBUF=low, produces the 1.2 V (typ) band-gap output (requires external decoupling) that feeds the internal buffer to generate 2.048 V on REF. With PDBUF=low, PDREF=high, applying 1.2 V here produces 2.048 V on REF."
      },
      {
        "number": "47",
        "name": "PDREF",
        "type": "input",
        "description": "Internal reference power-down input. Low = internal reference enabled; high = internal reference powered down and an external reference must be used."
      },
      {
        "number": "48",
        "name": "PDBUF",
        "type": "input",
        "description": "Internal reference buffer power-down input. Low = buffer enabled (must be low when using internal reference); high = buffer powered down."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885740721197056",
        "pages": 28,
        "sha256": "421bd15f46f1c4ca",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad7622bstz.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad7622bstz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          9.0,
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        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ea7217610279fdb1a83b41bb6086b415f4362c53ccbdcc8ab87f4c3ecf418df0",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Analog Devices",
      "Package": "LQFP-48(7x7)",
      "Category": "Analog ICs",
      "Pins": "48"
    }
  },
  "variants": [
    {
      "mpn": "AD7622BSTZ",
      "kind": "packaging"
    },
    {
      "mpn": "AD7622BSTZRL",
      "kind": "packaging"
    },
    {
      "mpn": "AD7622BSTZBCPZ",
      "kind": "packaging"
    },
    {
      "mpn": "AD7622BSTZBCPZRL",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ad7622bstz"
  ],
  "discovery_pitch": "AD7622BSTZ (Analog Devices) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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    "README.md",
    "ad7622bstz.kicad_sym",
    "ad7622bstz.kicad_mod",
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    "ad7622bstz.step",
    "ad7622bstz.lbr",
    "docs/hero.png",
    "docs/ad7622bstz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
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  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:37:19.097Z"
}