component
AD7610BCPZ
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "AD7610BCPZ",
"brief": "Analog Devices Analog To Digital Converters (ADCs), LFCSP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"manufacturer": "Analog Devices",
"package": "LFCSP-48(7x7)",
"pin_count": 49,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Analog To Digital Converters (ADCs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7610.pdf",
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"distributor_links": {
"lcsc": "C578451",
"digikey": "AD7610BCPZ-ND",
"mouser": "584-AD7610BCPZ"
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"pins": [
{
"number": "1",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground, the ground reference for all analog I/O, to be connected to the analog ground plane with AGND, DGND and OGND at the same potential."
},
{
"number": "2",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, nominally 4.75 V to 5.25 V, to be decoupled with 10 μF and 100 nF capacitors."
},
{
"number": "3",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground, the ground reference for all analog I/O, to be connected to the analog ground plane with AGND, DGND and OGND at the same potential."
},
{
"number": "4",
"name": "BYTESWAP",
"type": "input",
"description": "Parallel mode byte selection: when high the LSB is output on D[15:8] and the MSB on D[7:0]; when low the reverse."
},
{
"number": "5",
"name": "OB/2C",
"type": "input",
"description": "Output coding select: when high the output is straight binary, when low the MSB is inverted for twos complement output."
},
{
"number": "6",
"name": "OGND",
"type": "power_in",
"description": "Interface digital power ground, the ground reference for digital outputs, ideally at the same potential as AGND and DGND."
},
{
"number": "7",
"name": "OGND",
"type": "power_in",
"description": "Interface digital power ground, the ground reference for digital outputs, ideally at the same potential as AGND and DGND."
},
{
"number": "8",
"name": "SER/PAR",
"type": "input",
"description": "Serial/parallel selection: low selects parallel mode, high selects the serial modes."
},
{
"number": "9",
"name": "D0",
"type": "output",
"description": "Bit 0 of the parallel port data output bus, always an output regardless of the SER/PAR state."
},
{
"number": "10",
"name": "D1",
"type": "output",
"description": "Bit 1 of the parallel port data output bus, always an output regardless of the SER/PAR state."
},
{
"number": "11",
"name": "D2/DIVSCLK[0]",
"type": "bidirectional",
"description": "In parallel mode Bit 2 of the data output bus; in serial master read-after-convert mode DIVSCLK[0] slows the internal serial data clock."
},
{
"number": "12",
"name": "D3/DIVSCLK[1]",
"type": "bidirectional",
"description": "In parallel mode Bit 3 of the data output bus; in serial master read-after-convert mode DIVSCLK[1] slows the internal serial data clock."
},
{
"number": "13",
"name": "D4/EXT/INT",
"type": "bidirectional",
"description": "In parallel mode Bit 4 of the data output bus; in serial mode EXT/INT selects internal master clock (low) or external slave clock (high)."
},
{
"number": "14",
"name": "D5/INVSYNC",
"type": "bidirectional",
"description": "In parallel mode Bit 5 of the data output bus; in serial master mode INVSYNC selects the active level of SYNC."
},
{
"number": "15",
"name": "D6/INVSCLK",
"type": "bidirectional",
"description": "In parallel mode Bit 6 of the data output bus; in serial modes INVSCLK selects the rising (low) or falling (high) edge of SDCLK/SCCLK."
},
{
"number": "16",
"name": "D7/RDC/SDIN",
"type": "bidirectional",
"description": "In parallel mode Bit 7 of the data output bus; in serial mode it selects read-during-convert (RDC) or serves as serial data input SDIN for daisy-chaining."
},
{
"number": "17",
"name": "OGND",
"type": "power_in",
"description": "Interface digital power ground, the ground reference for digital outputs, ideally at the same potential as AGND and DGND."
},
{
"number": "18",
"name": "OVDD",
"type": "power_in",
"description": "Interface digital power, nominally 2.5 V, 3 V or 5 V matching the host interface, decoupled with 10 μF and 100 nF capacitors."
},
{
"number": "19",
"name": "DVDD",
"type": "power_in",
"description": "Digital power, nominally 4.75 V to 5.25 V, decoupled with 10 μF and 100 nF capacitors; can be supplied from AVDD."
},
{
"number": "20",
"name": "DGND",
"type": "power_in",
"description": "Digital power ground, the ground reference for digital circuitry, ideally at the same potential as AGND and OGND."
},
{
"number": "21",
"name": "D8/SDOUT",
"type": "output",
"description": "In parallel mode Bit 8 of the data output bus; in serial modes SDOUT is the serial data output synchronized to SDCLK."
},
{
"number": "22",
"name": "D9/SDCLK",
"type": "bidirectional",
"description": "In parallel mode Bit 9 of the data output bus; in serial modes SDCLK is the serial data clock input or output depending on EXT/INT."
},
{
"number": "23",
"name": "D10/SYNC",
"type": "output",
"description": "In parallel mode Bit 10 of the data output bus; in serial master mode SYNC is the digital frame synchronization output."
},
{
"number": "24",
"name": "D11/RDERROR",
"type": "output",
"description": "In parallel mode Bit 11 of the data output bus; in serial slave mode RDERROR is pulsed high when an incomplete data read is lost."
},
{
"number": "25",
"name": "D12/HW/SW",
"type": "bidirectional",
"description": "In parallel mode Bit 12 of the data output bus; in serial mode HW/SW selects software (low) or hardware (high) configuration."
},
{
"number": "26",
"name": "D13/SCIN",
"type": "bidirectional",
"description": "In parallel mode Bit 13 of the data output bus; in serial software configuration mode SCIN serially writes the configuration register MSB first."
},
{
"number": "27",
"name": "D14/SCCLK",
"type": "bidirectional",
"description": "In parallel mode Bit 14 of the data output bus; in serial software configuration mode SCCLK clocks in the data on SCIN."
},
{
"number": "28",
"name": "D15/SCCS",
"type": "bidirectional",
"description": "In parallel mode Bit 15 of the data output bus; in serial software configuration mode SCCS enables the serial configuration port."
},
{
"number": "29",
"name": "BUSY",
"type": "output",
"description": "Busy output that goes high when a conversion starts and stays high until the conversion is complete and data is latched; its falling edge can serve as a data-ready clock."
},
{
"number": "30",
"name": "TEN",
"type": "input",
"description": "Input range select used with BIPOLAR to set 0 V to 5 V, 0 V to 10 V, ±5 V or ±10 V ranges."
},
{
"number": "31",
"name": "RD",
"type": "input",
"description": "Read data: when CS and RD are both low the parallel or serial output bus is enabled."
},
{
"number": "32",
"name": "CS",
"type": "input",
"description": "Chip select: when CS and RD are both low the output bus is enabled; CS also gates the external clock in slave serial mode."
},
{
"number": "33",
"name": "RESET",
"type": "input",
"description": "Reset input: when high it resets the AD7610 and aborts any conversion; the falling edge clears the configuration register. If unused, tie to OGND."
},
{
"number": "34",
"name": "PD",
"type": "input",
"description": "Power-down input: when high the ADC is powered down, conversions are inhibited after the current one completes, and the digital interface remains active."
},
{
"number": "35",
"name": "CNVST",
"type": "input",
"description": "Conversion start: a falling edge puts the sample-and-hold into hold and initiates a conversion."
},
{
"number": "36",
"name": "BIPOLAR",
"type": "input",
"description": "Input range select used with TEN to choose the analog input range (see pin 30)."
},
{
"number": "37",
"name": "REF",
"type": "passive",
"description": "Reference input/output that produces 5 V when the internal reference is enabled, or accepts an external reference up to AVDD when disabled; requires at least 22 μF decoupling."
},
{
"number": "38",
"name": "REFGND",
"type": "passive",
"description": "Reference input analog ground, connected to the analog ground plane and carrying pulsed reference currents, so it needs a low-impedance return."
},
{
"number": "39",
"name": "IN−",
"type": "passive",
"description": "Analog input ground sense, connected to the analog ground plane or a remote sense ground."
},
{
"number": "40",
"name": "VCC",
"type": "power_in",
"description": "High-voltage positive supply, normally +7 V to +15 V."
},
{
"number": "41",
"name": "VEE",
"type": "power_in",
"description": "High-voltage negative supply, normally 0 V to −15 V (0 V in unipolar ranges)."
},
{
"number": "42",
"name": "AGND",
"type": "power_in",
"description": "Analog power ground, the ground reference for all analog I/O, to be connected to the analog ground plane with AGND, DGND and OGND at the same potential."
},
{
"number": "43",
"name": "IN+",
"type": "input",
"description": "Analog input referenced to IN−, sampled on the falling edge of CNVST."
},
{
"number": "44",
"name": "AVDD",
"type": "power_in",
"description": "Analog power supply, nominally 4.75 V to 5.25 V, to be decoupled with 10 μF and 100 nF capacitors."
},
{
"number": "45",
"name": "TEMP",
"type": "output",
"description": "Temperature sensor analog output, enabled when the internal reference is on (PDREF = PDBUF = low)."
},
{
"number": "46",
"name": "REFBUFIN",
"type": "input",
"description": "Reference buffer input: with an external reference and the internal buffer enabled, applying 2.5 V produces 5 V on REF."
},
{
"number": "47",
"name": "PDREF",
"type": "input",
"description": "Internal reference power-down input: low enables the internal reference, high powers it down so an external reference must be used."
},
{
"number": "48",
"name": "PDBUF",
"type": "input",
"description": "Internal reference buffer power-down input: low enables the buffer (required with the internal reference), high powers it down."
},
{
"number": "49",
"name": "EPAD",
"type": "passive",
"description": "Exposed pad, not connected internally and recommended to be soldered to VEE on the LFCSP package."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
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"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin mapping taken from Table 6 (Pin Function Descriptions) because the Figure 4 pin-diagram text is ; Pin 49 (EPAD) exists only on the LFCSP package (Table 6 footnote 3). The datasheet says it is not co"
],
"pages_sent": 11,
"cost_usd": 0.0399,
"at": "2026-10-30T22:39:40"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD7610.pdf",
"pages": 32,
"sha256": "a489071c9d854fb9",
"source_tier": "mfr"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
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"refuses_to_fabricate": true
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"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "LFCSP-48(7x7)",
"Category": "ADC/DAC/Data Conversion",
"Pins": "49"
},
"characteristics": {
"version": 1,
"source": "datasheet",
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{
"name": "Voltage Range VIN, 0 V to 5 V",
"symbol": "VIN",
"kind": "electrical",
"unit": "V",
"min": -0.1,
"typ": null,
"max": 5.1,
"conditions": "VIN+ − VIN− = 0 V to 5 V",
"source_page": 3,
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"symbol": "VIN",
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"min": -0.1,
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{
"name": "Voltage Range VIN− to AGND",
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"min": -0.1,
"typ": null,
"max": 0.1,
"conditions": "VIN− to AGND",
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{
"name": "Analog Input CMRR",
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"conditions": "fIN = 100 kHz",
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{
"name": "Integral Linearity Error",
"symbol": "INL",
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"unit": "LSB",
"min": -1.5,
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{
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{
"name": "Zero Error (Unipolar or Bipolar)",
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"min": -35,
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"conditions": "Unipolar or Bipolar",
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{
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{
"name": "Bipolar Full-Scale Error",
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{
"name": "Unipolar Full-Scale Error",
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"min": -70,
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{
"name": "Full-Scale Error Temperature Drift",
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{
"name": "Power Supply Sensitivity",
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"conditions": "AVDD = 5 V ± 5%",
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{
"name": "Throughput Rate",
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{
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"conditions": "VIN = 0 V to 5 V, fIN = 2 kHz, −60 dB",
"source_page": 3,
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{
"name": "Signal-to-Noise Ratio",
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{
"name": "Internal Reference Output Voltage",
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{
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