AD7606BSTZ-4RL

{
  "slug": "ad7606bstz-4rl",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices ADCs/DACs - Special Purpose, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "ad7606bstz-4rl",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad7606bstz-4rl.kicad_sym",
    "ad7606bstz-4rl.kicad_mod",
    "ad7606bstz-4rl.glb",
    "ad7606bstz-4rl.step",
    "ad7606bstz-4rl.lbr",
    "docs/hero.png",
    "docs/ad7606bstz-4rl-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad7606bstz-4rl-hero.glb",
    "ad7606bstz-4rl-hero.overlay.json",
    "ad7606bstz-4rl-etched.glb"
  ],
  "component": {
    "mpn": "AD7606BSTZ-4RL",
    "manufacturer": "Analog Devices",
    "package": "LQFP-64(10x10)",
    "pin_count": 64,
    "category": "Data Acquisition",
    "subcategory": "ADCs/DACs - Special Purpose",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586181906232168448",
    "parts": {
      "symbol": "ad7606bstz-4rl.kicad_sym",
      "footprint": "ad7606bstz-4rl.kicad_mod",
      "model_3d": "ad7606bstz-4rl-hero.glb",
      "model_3d_plain": "ad7606bstz-4rl-etched.glb",
      "model_3d_step": "ad7606bstz-4rl-etched.step",
      "model_3d_step_plain": "ad7606bstz-4rl.step",
      "lbr": "ad7606bstz-4rl.lbr"
    },
    "distributor_links": {
      "lcsc": "C51512",
      "digikey": "505-AD7606BSTZ-4RLTR-ND"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T17:20:08Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD7606BSTZ-4RLTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply voltage for the front-end amplifiers and ADC core, specified at 4.75 V to 5.25 V and to be decoupled to AGND."
      },
      {
        "number": "2",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry, to be connected to the system AGND plane."
      },
      {
        "number": "3",
        "name": "OS0",
        "type": "input",
        "description": "Oversampling mode control input, the LSB of the 3-bit oversampling ratio select (OS[2:0])."
      },
      {
        "number": "4",
        "name": "OS1",
        "type": "input",
        "description": "Oversampling mode control input, the middle bit of the 3-bit oversampling ratio select (OS[2:0])."
      },
      {
        "number": "5",
        "name": "OS2",
        "type": "input",
        "description": "Oversampling mode control input, the MSB of the 3-bit oversampling ratio select (OS[2:0])."
      },
      {
        "number": "6",
        "name": "PAR/SER/BYTE SEL",
        "type": "input",
        "description": "Logic input selecting the parallel interface when low and the serial interface when high; parallel byte mode requires this pin high together with DB15/BYTE SEL high."
      },
      {
        "number": "7",
        "name": "STBY",
        "type": "input",
        "description": "Standby mode input that powers down most circuitry (except the on-chip reference, regulators and regulator buffers) in standby, or all circuitry in shutdown, with the mode chosen by the RANGE pin state."
      },
      {
        "number": "8",
        "name": "RANGE",
        "type": "input",
        "description": "Logic input selecting the analog input range for all channels: logic high gives ±10 V and logic low gives ±5 V, with changes taking immediate effect and not recommended during conversion for fast throughput."
      },
      {
        "number": "9",
        "name": "CONVST A",
        "type": "input",
        "description": "Conversion start input A that initiates simultaneous sampling of V1 and V2 on the AD7606-4 and places their track-and-hold in hold on a low-to-high transition."
      },
      {
        "number": "10",
        "name": "CONVST B",
        "type": "input",
        "description": "Conversion start input B that initiates simultaneous sampling of V3 and V4 on the AD7606-4 and places their track-and-hold in hold on a low-to-high transition; usable only when oversampling is off."
      },
      {
        "number": "11",
        "name": "RESET",
        "type": "input",
        "description": "Reset input where a rising edge resets the device, requiring a RESET pulse after power-up, typically 50 ns wide, which aborts a conversion in progress or clears the output registers when applied during a read."
      },
      {
        "number": "12",
        "name": "RD/SCLK",
        "type": "input",
        "description": "Parallel read control (RD) when the parallel interface is selected, or serial clock input (SCLK) when the serial interface is selected."
      },
      {
        "number": "13",
        "name": "CS",
        "type": "input",
        "description": "Active-low chip select that frames data transfers; with RD low in parallel mode it enables the DB[15:0] output bus."
      },
      {
        "number": "14",
        "name": "BUSY",
        "type": "output",
        "description": "Busy output that goes high after the CONVST A and CONVST B rising edges and stays high until all channel conversions complete; its falling edge indicates data is latched and available after time t4."
      },
      {
        "number": "15",
        "name": "FRSTDATA",
        "type": "output",
        "description": "Digital output that indicates when the V1 result is being read on the parallel, byte or serial interface; it is three-stated when CS is high."
      },
      {
        "number": "16",
        "name": "DB0",
        "type": "tri_state",
        "description": "Parallel output data bit 0 (LSB) of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "17",
        "name": "DB1",
        "type": "tri_state",
        "description": "Parallel output data bit 1 of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "18",
        "name": "DB2",
        "type": "tri_state",
        "description": "Parallel output data bit 2 of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "19",
        "name": "DB3",
        "type": "tri_state",
        "description": "Parallel output data bit 3 of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "20",
        "name": "DB4",
        "type": "tri_state",
        "description": "Parallel output data bit 4 of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "21",
        "name": "DB5",
        "type": "tri_state",
        "description": "Parallel output data bit 5 of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "22",
        "name": "DB6",
        "type": "tri_state",
        "description": "Parallel output data bit 6 of the conversion result, three-stated when PAR/SER/BYTE SEL is low and tied to AGND when it is high."
      },
      {
        "number": "23",
        "name": "VDRIVE",
        "type": "power_in",
        "description": "Logic supply input that sets the interface voltage, specified at 2.3 V to 5.25 V and nominally the same supply as the host DSP or FPGA."
      },
      {
        "number": "24",
        "name": "DB7/DOUTA",
        "type": "tri_state",
        "description": "Parallel output data bit 7 (MSB in byte mode) or serial data output DOUTA when PAR/SER/BYTE SEL is high, three-stated when parallel mode is idle."
      },
      {
        "number": "25",
        "name": "DB8/DOUTB",
        "type": "tri_state",
        "description": "Parallel output data bit 8 or serial data output DOUTB when PAR/SER/BYTE SEL is high, three-stated when parallel mode is idle."
      },
      {
        "number": "26",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry, to be connected to the system AGND plane."
      },
      {
        "number": "27",
        "name": "DB9",
        "type": "tri_state",
        "description": "Parallel output data bit 9 of the conversion result, tied to AGND when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "28",
        "name": "DB10",
        "type": "tri_state",
        "description": "Parallel output data bit 10 of the conversion result, tied to AGND when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "29",
        "name": "DB11",
        "type": "tri_state",
        "description": "Parallel output data bit 11 of the conversion result, tied to AGND when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "30",
        "name": "DB12",
        "type": "tri_state",
        "description": "Parallel output data bit 12 of the conversion result, tied to AGND when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "31",
        "name": "DB13",
        "type": "tri_state",
        "description": "Parallel output data bit 13 of the conversion result, tied to AGND when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "32",
        "name": "DB14/HBEN",
        "type": "bidirectional",
        "description": "Parallel output data bit 14, or high byte enable (HBEN) in parallel byte mode selecting MSB-first (HBEN high) or LSB-first (HBEN low) output; tied to GND in serial mode."
      },
      {
        "number": "33",
        "name": "DB15/BYTE SEL",
        "type": "bidirectional",
        "description": "Parallel output data bit 15, or byte mode select which chooses serial mode (low) or parallel byte mode (high) when PAR/SER/BYTE SEL is high."
      },
      {
        "number": "34",
        "name": "REF SELECT",
        "type": "input",
        "description": "Internal/external reference selection input where logic high enables the internal 2.5 V reference and logic low disables it, requiring an external 2.5 V reference on REFIN/REFOUT."
      },
      {
        "number": "35",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry, to be connected to the system AGND plane."
      },
      {
        "number": "36",
        "name": "REGCAP",
        "type": "power_out",
        "description": "Decoupling pin for the internal regulator output, to be decoupled to AGND with a 1 µF capacitor, with a voltage in the range of 2.5 V to 2.7 V."
      },
      {
        "number": "37",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply voltage for the front-end amplifiers and ADC core, specified at 4.75 V to 5.25 V and to be decoupled to AGND."
      },
      {
        "number": "38",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply voltage for the front-end amplifiers and ADC core, specified at 4.75 V to 5.25 V and to be decoupled to AGND."
      },
      {
        "number": "39",
        "name": "REGCAP",
        "type": "power_out",
        "description": "Decoupling pin for the internal regulator output, to be decoupled to AGND with a 1 µF capacitor, with a voltage in the range of 2.5 V to 2.7 V."
      },
      {
        "number": "40",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry, to be connected to the system AGND plane."
      },
      {
        "number": "41",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry, to be connected to the system AGND plane."
      },
      {
        "number": "42",
        "name": "REFIN/REFOUT",
        "type": "bidirectional",
        "description": "Reference input or output at 2.5 V: it outputs the internal reference when REF SELECT is high, or accepts an external 2.5 V reference when REF SELECT is low, and needs a 10 µF capacitor to ground near REFGND."
      },
      {
        "number": "43",
        "name": "REFGND",
        "type": "power_in",
        "description": "Reference ground pin that should be connected to AGND."
      },
      {
        "number": "44",
        "name": "REFCAPA",
        "type": "power_out",
        "description": "Reference buffer output force/sense pin, which must be tied together with REFCAPB and decoupled to AGND with a low ESR 10 µF ceramic capacitor, typically at 4.5 V."
      },
      {
        "number": "45",
        "name": "REFCAPB",
        "type": "power_out",
        "description": "Reference buffer output force/sense pin, which must be tied together with REFCAPA and decoupled to AGND with a low ESR 10 µF ceramic capacitor, typically at 4.5 V."
      },
      {
        "number": "46",
        "name": "REFGND",
        "type": "power_in",
        "description": "Reference ground pin that should be connected to AGND."
      },
      {
        "number": "47",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground reference for all analog circuitry, to be connected to the system AGND plane."
      },
      {
        "number": "48",
        "name": "AVCC",
        "type": "power_in",
        "description": "Analog supply voltage for the front-end amplifiers and ADC core, specified at 4.75 V to 5.25 V and to be decoupled to AGND."
      },
      {
        "number": "49",
        "name": "V1",
        "type": "passive",
        "description": "Single-ended analog input channel 1 whose input range (±10 V or ±5 V) is set by the RANGE pin."
      },
      {
        "number": "50",
        "name": "V1GND",
        "type": "power_in",
        "description": "Analog input ground for analog input V1, to be connected to the system AGND plane."
      },
      {
        "number": "51",
        "name": "V2",
        "type": "passive",
        "description": "Single-ended analog input channel 2 whose input range (±10 V or ±5 V) is set by the RANGE pin."
      },
      {
        "number": "52",
        "name": "V2GND",
        "type": "power_in",
        "description": "Analog input ground for analog input V2, to be connected to the system AGND plane."
      },
      {
        "number": "53",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input on the 8-channel part), to be connected to the system AGND plane."
      },
      {
        "number": "54",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input ground on the 8-channel part), to be connected to the system AGND plane."
      },
      {
        "number": "55",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input on the 6- and 8-channel parts), to be connected to the system AGND plane."
      },
      {
        "number": "56",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input ground on the 6- and 8-channel parts), to be connected to the system AGND plane."
      },
      {
        "number": "57",
        "name": "V3",
        "type": "passive",
        "description": "Single-ended analog input channel 3 whose input range (±10 V or ±5 V) is set by the RANGE pin."
      },
      {
        "number": "58",
        "name": "V3GND",
        "type": "power_in",
        "description": "Analog input ground for analog input V3, to be connected to the system AGND plane."
      },
      {
        "number": "59",
        "name": "V4",
        "type": "passive",
        "description": "Single-ended analog input channel 4 whose input range (±10 V or ±5 V) is set by the RANGE pin."
      },
      {
        "number": "60",
        "name": "V4GND",
        "type": "power_in",
        "description": "Analog input ground for analog input V4, to be connected to the system AGND plane."
      },
      {
        "number": "61",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input on the 6- and 8-channel parts), to be connected to the system AGND plane."
      },
      {
        "number": "62",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input ground on the 6- and 8-channel parts), to be connected to the system AGND plane."
      },
      {
        "number": "63",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input on the 8-channel and 6-channel parts), to be connected to the system AGND plane."
      },
      {
        "number": "64",
        "name": "AGND",
        "type": "power_in",
        "description": "On the AD7606-4 this pin is an AGND pin (it is an analog input ground on the 8-channel and 6-channel parts), to be connected to the system AGND plane."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin numbers for the OS[2:0], DB0-DB6 and DB9-DB13 groups are given as ranges in Table 6 (e.g. '5, 4,; Table 6 lists these pins as analog inputs or input grounds for the AD7606 and AD7606-6, and as AGND ; The datasheet text gives the 4.75 V to 5.25 V AVCC range and 2.3 V to 5.25 V VDRIVE range, but the F"
        ],
        "pages_sent": 13,
        "cost_usd": 0.1282,
        "at": "2026-10-18T17:19:39"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586181906232168448",
        "pages": 36,
        "sha256": "fba066bca6916cc7",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 64,
        "described": 64,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b0c827bc5c05552175d28affe44a5bd2ab45c9c36efff6ff07a74cc449b13db4",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad7606bstz-4rl-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "80debf491f4e2a2fd7d6464a43b25921cacb093fb4705d7224e435fcbb361a9d",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}