component
AD7323BRUZ-REEL7
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Analog Devices Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD7323BRUZ-REEL7
Analog Devices · Analog To Digital Converters (ADCs) · TSSOP-16
AD7323BRUZ-REEL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Active-low chip select that initiates conversions on the AD7323 and frames the serial data transfer. |
| 2 | DIN | input | Serial data input for the on-chip registers, clocked in on the falling edge of SCLK. |
| 3 | DGND | power_in | Digital ground reference for all digital circuitry; DGND and AGND must not be more than 0.3 V apart, even on a transient basis. |
| 4 | AGND | power_in | Analog ground reference for all analog circuitry, analog inputs and external reference; AGND and DGND must not be more than 0.3 V apart, even on a transient basis. |
| 5 | REFIN/OUT | bidirectional | Reference input/output providing the nominal 2.5 V internal reference (with a 680 nF capacitor) or accepting an external reference, which is the power-up default. |
| 6 | VSS | power_in | Negative supply voltage for the analog input section. |
| 7 | VIN0 | input | Analog input 0, multiplexed into the track-and-hold, with ranges of ±10 V, ±5 V, ±2.5 V or 0 V to +10 V selected by the range register. |
| 8 | VIN1 | input | Analog input 1, multiplexed into the track-and-hold, with ranges of ±10 V, ±5 V, ±2.5 V or 0 V to +10 V selected by the range register. |
| 9 | VIN2 | input | Analog input 2, multiplexed into the track-and-hold, with ranges of ±10 V, ±5 V, ±2.5 V or 0 V to +10 V selected by the range register. |
| 10 | VIN3 | input | Analog input 3, multiplexed into the track-and-hold, with ranges of ±10 V, ±5 V, ±2.5 V or 0 V to +10 V selected by the range register. |
| 11 | VDD | power_in | Positive supply voltage for the analog input section. |
| 12 | VCC | power_in | Analog supply voltage of 2.7 V to 5.25 V for the ADC core, to be decoupled to AGND. |
| 13 | VDRIVE | power_in | Logic power supply input setting the interface voltage, decoupled to DGND, and not to exceed VCC by more than 0.3 V. |
| 14 | DOUT | output | Serial data output of the conversion result, MSB first, clocked out on the falling edge of SCLK with 16 SCLKs required to access the data. |
| 15 | DGND | power_in | Digital ground reference for all digital circuitry; DGND and AGND must not be more than 0.3 V apart, even on a transient basis. |
| 16 | SCLK | input | Serial clock input used for accessing data and also as the clock source for the conversion process. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-16 |
| Category | Data Converters |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Signal-to-Noise Ratio, differential | SNR | 76 | dB | fIN = 50 kHz; Differential mode, VCC = 4.75 V to 5.25 V | 3 | ||
| Signal-to-Noise Ratio, differential, low VCC | SNR | 75.5 | dB | Differential mode, VCC < 4.75 V | 3 | ||
| Signal-to-Noise Ratio, single-ended | SNR | 72.5 | dB | Single-ended/pseudo differential mode; ±10 V, ±2.5 V and ±5 V ranges, VCC = 4.75 V to 5.25 V | 3 | ||
| Signal-to-Noise Ratio, single-ended 0-10 V | SNR | 72 | dB | Single-ended/pseudo differential mode; 0 V to 10 V, VCC = 4.75 V to 5.25 V and all ranges at VCC < 4.75 V | 3 | ||
| SINAD differential ±2.5 V/±5 V | SINAD | 75 | dB | Differential mode; ±2.5 V and ±5 V ranges | 3 | ||
| SINAD differential 0-10 V | SINAD | 74 | dB | Differential mode; 0 V to 10 V | 3 | ||
| SINAD differential ±10 V | SINAD | 76 | dB | Differential mode; ±10 V range | 3 | ||
| SINAD single-ended ±2.5 V/±5 V | SINAD | 72 | dB | Single-ended/pseudo differential mode; ±2.5 V and ±5 V ranges | 3 | ||
| SINAD single-ended 0-10 V/±10 V | SINAD | 72.5 | dB | Single-ended/pseudo differential mode; 0 V to +10 V and ±10 V ranges | 3 | ||
| THD differential ±2.5 V/±5 V | THD | -80 | dB | Differential mode; ±2.5 V and ±5 V ranges | 3 | ||
| THD differential 0-10 V | THD | -79 | dB | Differential mode; 0 V to 10 V ranges | 3 | ||
| THD differential ±10 V | THD | -82 | dB | Differential mode; ±10 V range | 3 | ||
| THD single-ended ±5 V | THD | -77 | dB | Single-ended/pseudo differential mode; ±5 V range | 3 | ||
| THD single-ended ±2.5 V | THD | -79 | dB | Single-ended/pseudo differential mode; ±2.5 V range | 3 | ||
| THD single-ended 0-10 V/±10 V | THD | -80 | dB | Single-ended/pseudo differential mode; 0 V to +10 V and ±10 V ranges | 3 | ||
| SFDR differential ±2.5 V/±5 V | SFDR | -81 | dB | Differential mode; ±2.5 V and ±5 V ranges | 3 | ||
| SFDR differential 0-10 V | SFDR | -80 | dB | Differential mode; 0 V to 10 V ranges | 3 | ||
| SFDR differential ±10 V | SFDR | -82 | dB | Differential mode; ±10 V ranges | 3 | ||
| SFDR single-ended ±5 V | SFDR | -78 | dB | Single-ended/pseudo differential mode; ±5 V range | 3 | ||
| SFDR single-ended ±2.5 V | SFDR | -80 | dB | Single-ended/pseudo differential mode; ±2.5 V range | 3 | ||
| SFDR single-ended 0-10 V/±10 V | SFDR | -79 | dB | Single-ended/pseudo differential mode; 0 V to +10 V and ±10 V ranges | 3 | ||
| CMRR | CMRR | -79 | dB | Up to 100 kHz ripple frequency; see Figure 17 | 3 | ||
| Channel-to-Channel Isolation | -72 | dB | fIN on unselected channels up to 100 kHz; see Figure 14 | 3 | |||
| INL differential | INL | -1.1 | 1.1 | LSB | Differential mode; VCC = 3 V to 5.25 V, typ for VCC = 2.7 V | 4 | |
| INL single-ended | INL | -1 | 1 | LSB | Single-ended/pseudo differential mode, VCC = 3 V to 5.25 V, typical for VCC = 2.7 V | 4 | |
| DNL differential | DNL | -0.9 | 1.2 | LSB | Differential mode; guaranteed no missing codes to 13 bits | 4 | |
| DNL single-ended | DNL | -0.9 | 0.9 | LSB | Single-ended mode; guaranteed no missing codes to 12 bits | 4 | |
| Offset Error single-ended | -4 | 9 | LSB | Single-ended/pseudo differential mode | 4 | ||
| Offset Error differential | -7 | 10 | LSB | Differential mode | 4 | ||
| Gain Error single-ended | -8 | 8 | LSB | Single-ended/pseudo differential mode | 4 | ||
| Gain Error differential | -14 | 14 | LSB | Differential mode | 4 | ||
| Positive Full-Scale Error single-ended | -4 | 4 | LSB | Single-ended/pseudo differential mode | 4 | ||
| Positive Full-Scale Error differential | -7 | 7 | LSB | Differential mode | 4 | ||
| Bipolar Zero Error single-ended | -8.5 | 8.5 | LSB | Single-ended/pseudo differential mode | 4 | ||
| Bipolar Zero Error differential | -7.5 | 7.5 | LSB | Differential mode | 4 | ||
| Negative Full-Scale Error single-ended | -4 | 4 | LSB | Single-ended/pseudo differential mode | 4 | ||
| Negative Full-Scale Error differential | -6 | 6 | LSB | Differential mode | 4 | ||
| DC Leakage Current | -80 | 80 | nA | VIN = VDD or VSS | 4 | ||
| Reference Input Voltage Range | 2.5 | 3 | V | 5 | |||
| Reference Input DC Leakage Current | -1 | 1 | µA | 5 | |||
| Reference Output Voltage Error at 25°C | -5 | 5 | mV | 5 | |||
| Reference Output Voltage Error TMIN to TMAX | -10 | 10 | mV | 5 | |||
| Reference Temperature Coefficient | 3 | 25 | ppm/°C | 5 | |||
| Input High Voltage | VINH | 2.4 | V | 5 | |||
| Input Low Voltage | VINL | 0.8 | V | VCC = 4.75 V to 5.25 V | 5 | ||
| Input Low Voltage | VINL | 0.4 | V | VCC = 2.7 V to 3.6 V | 5 | ||
| Logic Input Current | IIN | -1 | 1 | µA | VIN = 0 V or VDRIVE | 5 | |
| Output High Voltage | VOH | -0.2 | V | ISOURCE = 200 µA; min is VDRIVE − 0.2 V | 5 | ||
| Output Low Voltage | VOL | 0.4 | V | ISINK = 200 µA | 5 | ||
| Floating-State Leakage Current | -1 | 1 | µA | 5 | |||
| Throughput Rate | 500 | kSPS | See the Serial Interface section | 5 | |||
| VDD supply | VDD | 12 | 16.5 | V | See Table 6 | 5 | |
| VSS supply | VSS | -16.5 | -12 | V | See Table 6 | 5 | |
| VCC supply | VCC | 2.7 | 5.25 | V | See Table 6 | 5 | |
| VDRIVE supply | VDRIVE | 2.7 | 5.25 | V | 5 | ||
| Operating Temperature Range | -40 | 85 | °C | 8 | |||
| Storage Temperature Range | -65 | 150 | °C | TA = 25°C | 8 | ||
| Junction Temperature | 150 | °C | TA = 25°C | 8 | |||
| VDD to AGND, DGND | -0.3 | 16.5 | V | TA = 25°C | 8 | ||
| VSS to AGND, DGND | -16.5 | 0.3 | V | TA = 25°C; printed +0.3 V to -16.5 V | 8 | ||
| VCC to AGND, DGND | -0.3 | 7 | V | TA = 25°C | 8 | ||
| Thermal Impedance, junction to ambient | θJA | 150 | °C/W | TSSOP package | 8 |
CAD (KiCad official)
- Symbol:
AD7323BRUZ-REEL7 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ad7323bruz-reel7-etched.step/ad7323bruz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7323bruz-reel7.step/ad7323bruz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (36 pp, sha256
4285fdcbd3118288, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).