component
AD7266BSUZ-REEL
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADC), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Analog Devices Analog To Digital Converters (ADC), TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"data acquisition",
"ad7266bsuz-reel",
"factory-2.0.0",
"extractor-text"
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"component": {
"mpn": "AD7266BSUZ-REEL",
"manufacturer": "Analog Devices",
"package": "TQFP-32(7x7)",
"pin_count": 32,
"category": "Data Acquisition",
"subcategory": "Analog To Digital Converters (ADC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589800876656529408",
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"lbr": "ad7266bsuz-reel.lbr"
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"distributor_links": {
"lcsc": "C650745",
"digikey": "AD7266BSUZ-REELTR-ND",
"mouser": "584-AD7266BSUZ-R"
},
"distributor_check": {
"checked_at": "2026-10-21T01:51:18Z",
"source": "Component Ocean /api/assign-pns",
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"status": "found",
"lifecycle": "Active"
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"status": "found"
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"pins": [
{
"number": "1",
"name": "DGND",
"type": "power_in",
"description": "Digital ground reference for all digital circuitry; both DGND pins connect to the system DGND plane and must not be more than 0.3 V from AGND, even on a transient basis."
},
{
"number": "2",
"name": "REF SELECT",
"type": "input",
"description": "Logic input for reference selection: tied to DGND uses the on-chip 2.5 V reference for both ADCs, while a logic high allows an external reference through DCAPA and/or DCAPB."
},
{
"number": "3",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply voltage of 2.7 V to 5.25 V, the only supply for all analog circuitry, which must stay within 0.3 V of DVDD and be decoupled to AGND."
},
{
"number": "4",
"name": "DCAPA",
"type": "passive",
"description": "Decoupling capacitor pin for the ADC A reference buffer, where 470 nF is recommended and a buffered on-chip reference can be taken or an external reference applied, depending on the selected input range."
},
{
"number": "5",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry; all three AGND pins connect to the system AGND plane and must not be more than 0.3 V from DGND."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry; all three AGND pins connect to the system AGND plane and must not be more than 0.3 V from DGND."
},
{
"number": "7",
"name": "VA1",
"type": "passive",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "8",
"name": "VA2",
"type": "passive",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "9",
"name": "VA3",
"type": "passive",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "10",
"name": "VA4",
"type": "passive",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "11",
"name": "VA5",
"type": "passive",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "12",
"name": "VA6",
"type": "passive",
"description": "Analog input of ADC A, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "13",
"name": "VB6",
"type": "passive",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "14",
"name": "VB5",
"type": "passive",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "15",
"name": "VB4",
"type": "passive",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "16",
"name": "VB3",
"type": "passive",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "17",
"name": "VB2",
"type": "passive",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "18",
"name": "VB1",
"type": "passive",
"description": "Analog input of ADC B, programmable as one of six single-ended channels or as one of three true differential pairs."
},
{
"number": "19",
"name": "AGND",
"type": "power_in",
"description": "Analog ground reference for all analog circuitry; all three AGND pins connect to the system AGND plane and must not be more than 0.3 V from DGND."
},
{
"number": "20",
"name": "DCAPB",
"type": "passive",
"description": "Decoupling capacitor pin for the ADC B reference buffer, where 470 nF is recommended and a buffered on-chip reference can be taken or an external reference applied, depending on the selected input range."
},
{
"number": "21",
"name": "RANGE",
"type": "input",
"description": "Logic input setting the analog input range: tied low selects 0 V to VREF, and a logic high when CS goes low selects 2 × VREF."
},
{
"number": "22",
"name": "SGL/DIFF",
"type": "input",
"description": "Logic input selecting differential pairs when low and single-ended operation when high."
},
{
"number": "23",
"name": "A2",
"type": "input",
"description": "Multiplexer select logic input choosing the channel pair converted simultaneously, which must be set before the acquisition time and the falling edge of CS."
},
{
"number": "24",
"name": "A1",
"type": "input",
"description": "Multiplexer select logic input choosing the channel pair converted simultaneously, which must be set before the acquisition time and the falling edge of CS."
},
{
"number": "25",
"name": "A0",
"type": "input",
"description": "Multiplexer select logic input choosing the channel pair converted simultaneously, which must be set before the acquisition time and the falling edge of CS."
},
{
"number": "26",
"name": "CS",
"type": "input",
"description": "Active-low chip select that initiates conversions on its falling edge and frames the serial data transfer."
},
{
"number": "27",
"name": "SCLK",
"type": "input",
"description": "Serial clock logic input that clocks data out of the AD7266 and also serves as the conversion clock source."
},
{
"number": "28",
"name": "DOUTB",
"type": "output",
"description": "Serial data output for ADC B, clocked out on the SCLK falling edge with 14 SCLKs needed to read the MSB-first data (two leading zeros then 12 data bits)."
},
{
"number": "29",
"name": "DGND",
"type": "power_in",
"description": "Digital ground reference for all digital circuitry; both DGND pins connect to the system DGND plane and must not be more than 0.3 V from AGND, even on a transient basis."
},
{
"number": "30",
"name": "DOUTA",
"type": "output",
"description": "Serial data output for ADC A, clocked out on the SCLK falling edge with 14 SCLKs needed to read the MSB-first data (two leading zeros then 12 data bits)."
},
{
"number": "31",
"name": "VDRIVE",
"type": "power_in",
"description": "Logic power supply input that sets the interface voltage, must be decoupled to DGND, and should never exceed AVDD or DVDD by more than 0.3 V."
},
{
"number": "32",
"name": "DVDD",
"type": "power_in",
"description": "Digital supply voltage of 2.7 V to 5.25 V, the supply for all digital circuitry, which must stay within 0.3 V of AVDD and be decoupled to DGND."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The TQFP pin figure (Figure 3) text layer is scrambled, so the TQFP pin-number-to-name mapping was t; The datasheet does not give electrical types for the analog inputs, DCAP pins, or DOUTA/DOUTB (tri-s; Pin 1 and 29 are both DGND, and pins 5, 6 and 19 are all AGND; these are listed individually as prin"
],
"pages_sent": 10,
"cost_usd": 0.0808,
"at": "2026-10-21T01:47:40"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589800876656529408",
"pages": 28,
"sha256": "ef619f55aa5e6d94",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 32,
"described": 32,
"cites_pages": true,
"refuses_to_fabricate": true
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