component

AD7124-4BRUZ-RL

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Analog Devices Analog To Digital Converters (ADCs), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionad7124-4bruz-rlfactory-2.0.0extractor-text
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ad7124-4bruz-rl: symbol repaired (body fitted to the names)

Ray ·ef7e662e43 ·5h ago ·parent 7601ea0
2 files changed +67−56
ad7124-4bruz-rl.kicad_sym+25−25ad7124-4bruz-rl.lbr+42−31
ad7124-4bruz-rl.kicad_sym+25−25
@@ -4,103 +4,103 @@     (property "Value" "AD7124-4BRUZ-RL" (at 0 -20.32 0) (effects (font (size 1.27 1.27))))     (property "Footprint" "" (at 0 0 0) (effects (font (size 1.27 1.27)) hide))     (symbol "AD7124-4BRUZ-RL_0_1"-    (rectangle (start -12.70 15.24) (end 12.70 -17.78)+    (rectangle (start -25.40 15.24) (end 25.40 -17.78)       (stroke (width 0.254) (type default)) (fill (type background)))     )     (symbol "AD7124-4BRUZ-RL_1_1"-    (pin input line (at -17.78 12.70 0) (length 5.08)+    (pin input line (at -30.48 12.70 0) (length 5.08)       (name "DIN" (effects (font (size 1.27 1.27))))       (number "1" (effects (font (size 1.27 1.27))))     )-    (pin input line (at -17.78 10.16 0) (length 5.08)+    (pin input line (at -30.48 10.16 0) (length 5.08)       (name "SCLK" (effects (font (size 1.27 1.27))))       (number "2" (effects (font (size 1.27 1.27))))     )-    (pin bidirectional line (at -17.78 7.62 0) (length 5.08)+    (pin bidirectional line (at -30.48 7.62 0) (length 5.08)       (name "CLK" (effects (font (size 1.27 1.27))))       (number "3" (effects (font (size 1.27 1.27))))     )-    (pin input line (at -17.78 5.08 0) (length 5.08)+    (pin input line (at -30.48 5.08 0) (length 5.08)       (name "CS" (effects (font (size 1.27 1.27))))       (number "4" (effects (font (size 1.27 1.27))))     )-    (pin power_out line (at -17.78 2.54 0) (length 5.08)+    (pin power_out line (at -30.48 2.54 0) (length 5.08)       (name "REGCAPD" (effects (font (size 1.27 1.27))))       (number "5" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 0.00 0) (length 5.08)+    (pin power_in line (at -30.48 0.00 0) (length 5.08)       (name "IOVDD" (effects (font (size 1.27 1.27))))       (number "6" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at -17.78 -2.54 0) (length 5.08)+    (pin power_in line (at -30.48 -2.54 0) (length 5.08)       (name "DGND" (effects (font (size 1.27 1.27))))       (number "7" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at -17.78 -5.08 0) (length 5.08)+    (pin passive line (at -30.48 -5.08 0) (length 5.08)       (name "AIN0/IOUT/VBIAS" (effects (font (size 1.27 1.27))))       (number "8" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at -17.78 -7.62 0) (length 5.08)+    (pin passive line (at -30.48 -7.62 0) (length 5.08)       (name "AIN1/IOUT/VBIAS" (effects (font (size 1.27 1.27))))       (number "9" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at -17.78 -10.16 0) (length 5.08)+    (pin passive line (at -30.48 -10.16 0) (length 5.08)       (name "AIN2/IOUT/VBIAS/P1" (effects (font (size 1.27 1.27))))       (number "10" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at -17.78 -12.70 0) (length 5.08)+    (pin passive line (at -30.48 -12.70 0) (length 5.08)       (name "AIN3/IOUT/VBIAS/P2" (effects (font (size 1.27 1.27))))       (number "11" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at -17.78 -15.24 0) (length 5.08)+    (pin passive line (at -30.48 -15.24 0) (length 5.08)       (name "REFIN1(+)" (effects (font (size 1.27 1.27))))       (number "12" (effects (font (size 1.27 1.27))))     )-    (pin output line (at 17.78 12.70 180) (length 5.08)+    (pin output line (at 30.48 12.70 180) (length 5.08)       (name "DOUT/RDY" (effects (font (size 1.27 1.27))))       (number "24" (effects (font (size 1.27 1.27))))     )-    (pin input line (at 17.78 10.16 180) (length 5.08)+    (pin input line (at 30.48 10.16 180) (length 5.08)       (name "SYNC" (effects (font (size 1.27 1.27))))       (number "23" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 7.62 180) (length 5.08)+    (pin power_in line (at 30.48 7.62 180) (length 5.08)       (name "AVDD" (effects (font (size 1.27 1.27))))       (number "22" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 5.08 180) (length 5.08)+    (pin passive line (at 30.48 5.08 180) (length 5.08)       (name "PSW" (effects (font (size 1.27 1.27))))       (number "21" (effects (font (size 1.27 1.27))))     )-    (pin power_out line (at 17.78 2.54 180) (length 5.08)+    (pin power_out line (at 30.48 2.54 180) (length 5.08)       (name "REGCAPA" (effects (font (size 1.27 1.27))))       (number "20" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 0.00 180) (length 5.08)+    (pin power_in line (at 30.48 0.00 180) (length 5.08)       (name "AVSS" (effects (font (size 1.27 1.27))))       (number "19" (effects (font (size 1.27 1.27))))     )-    (pin power_out line (at 17.78 -2.54 180) (length 5.08)+    (pin power_out line (at 30.48 -2.54 180) (length 5.08)       (name "REFOUT" (effects (font (size 1.27 1.27))))       (number "18" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 -5.08 180) (length 5.08)+    (pin passive line (at 30.48 -5.08 180) (length 5.08)       (name "AIN7/IOUT/VBIAS/REFIN2(−)" (effects (font (size 1.27 1.27))))       (number "17" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 -7.62 180) (length 5.08)+    (pin passive line (at 30.48 -7.62 180) (length 5.08)       (name "AIN6/IOUT/VBIAS/REFIN2(+)" (effects (font (size 1.27 1.27))))       (number "16" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 -10.16 180) (length 5.08)+    (pin passive line (at 30.48 -10.16 180) (length 5.08)       (name "AIN5/IOUT/VBIAS" (effects (font (size 1.27 1.27))))       (number "15" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 -12.70 180) (length 5.08)+    (pin passive line (at 30.48 -12.70 180) (length 5.08)       (name "AIN4/IOUT/VBIAS" (effects (font (size 1.27 1.27))))       (number "14" (effects (font (size 1.27 1.27))))     )-    (pin passive line (at 17.78 -15.24 180) (length 5.08)+    (pin passive line (at 30.48 -15.24 180) (length 5.08)       (name "REFIN1(−)" (effects (font (size 1.27 1.27))))       (number "13" (effects (font (size 1.27 1.27))))     )
ad7124-4bruz-rl.lbr+42−31
@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>Analog Devices Analog To Digital Converters (ADCs), TSSOP-24. Pinout cross-checked by two models against the datasheet</description> <packages> <package name="TSSOP-24_4.4x7.8mm_P0.65mm">   <description>TSSOP-24, 4.4 x 7.8 mm, 0.65 mm pitch</description>@@ -98,41 +98,42 @@ </packages> <symbols> <symbol name="AD7124-4BRUZ-RL">-  <wire x1="-12.7" y1="15.24" x2="12.7" y2="15.24" width="0.254" layer="94"/>-  <wire x1="12.7" y1="15.24" x2="12.7" y2="-17.78" width="0.254" layer="94"/>-  <wire x1="12.7" y1="-17.78" x2="-12.7" y2="-17.78" width="0.254" layer="94"/>-  <wire x1="-12.7" y1="-17.78" x2="-12.7" y2="15.24" width="0.254" layer="94"/>+  <description>Analog Devices Analog To Digital Converters (ADCs), TSSOP-24. Pinout cross-checked by two models against the datasheet</description>+  <wire x1="-25.4" y1="15.24" x2="25.4" y2="15.24" width="0.254" layer="94"/>+  <wire x1="25.4" y1="15.24" x2="25.4" y2="-17.78" width="0.254" layer="94"/>+  <wire x1="25.4" y1="-17.78" x2="-25.4" y2="-17.78" width="0.254" layer="94"/>+  <wire x1="-25.4" y1="-17.78" x2="-25.4" y2="15.24" width="0.254" layer="94"/>   <text x="0.0000" y="17.7800" size="1.27" layer="95" align="center">&gt;NAME</text>   <text x="0.0000" y="-20.3200" size="1.27" layer="96" align="center">&gt;VALUE</text>-  <pin name="DIN" x="-17.78" y="12.7" length="middle" direction="in"/>-  <pin name="SCLK" x="-17.78" y="10.16" length="middle" direction="in"/>-  <pin name="CLK" x="-17.78" y="7.62" length="middle" direction="io"/>-  <pin name="CS" x="-17.78" y="5.08" length="middle" direction="in"/>-  <pin name="REGCAPD" x="-17.78" y="2.54" length="middle" direction="out"/>-  <pin name="IOVDD" x="-17.78" y="0" length="middle" direction="pwr"/>-  <pin name="DGND" x="-17.78" y="-2.54" length="middle" direction="pwr"/>-  <pin name="AIN0/IOUT/VBIAS" x="-17.78" y="-5.08" length="middle" direction="pas"/>-  <pin name="AIN1/IOUT/VBIAS" x="-17.78" y="-7.62" length="middle" direction="pas"/>-  <pin name="AIN2/IOUT/VBIAS/P1" x="-17.78" y="-10.16" length="middle" direction="pas"/>-  <pin name="AIN3/IOUT/VBIAS/P2" x="-17.78" y="-12.7" length="middle" direction="pas"/>-  <pin name="REFIN1_+" x="-17.78" y="-15.24" length="middle" direction="pas"/>-  <pin name="DOUT/RDY" x="17.78" y="12.7" length="middle" direction="out" rot="R180"/>-  <pin name="SYNC" x="17.78" y="10.16" length="middle" direction="in" rot="R180"/>-  <pin name="AVDD" x="17.78" y="7.62" length="middle" direction="pwr" rot="R180"/>-  <pin name="PSW" x="17.78" y="5.08" length="middle" direction="pas" rot="R180"/>-  <pin name="REGCAPA" x="17.78" y="2.54" length="middle" direction="out" rot="R180"/>-  <pin name="AVSS" x="17.78" y="0" length="middle" direction="pwr" rot="R180"/>-  <pin name="REFOUT" x="17.78" y="-2.54" length="middle" direction="out" rot="R180"/>-  <pin name="AIN7/IOUT/VBIAS/REFIN2" x="17.78" y="-5.08" length="middle" direction="pas" rot="R180"/>-  <pin name="AIN6/IOUT/VBIAS/REFIN2_+" x="17.78" y="-7.62" length="middle" direction="pas" rot="R180"/>-  <pin name="AIN5/IOUT/VBIAS" x="17.78" y="-10.16" length="middle" direction="pas" rot="R180"/>-  <pin name="AIN4/IOUT/VBIAS" x="17.78" y="-12.7" length="middle" direction="pas" rot="R180"/>-  <pin name="REFIN1" x="17.78" y="-15.24" length="middle" direction="pas" rot="R180"/>+  <pin name="DIN" x="-30.48" y="12.7" length="middle" direction="in"/>+  <pin name="SCLK" x="-30.48" y="10.16" length="middle" direction="in"/>+  <pin name="CLK" x="-30.48" y="7.62" length="middle" direction="io"/>+  <pin name="CS" x="-30.48" y="5.08" length="middle" direction="in"/>+  <pin name="REGCAPD" x="-30.48" y="2.54" length="middle" direction="out"/>+  <pin name="IOVDD" x="-30.48" y="0" length="middle" direction="pwr"/>+  <pin name="DGND" x="-30.48" y="-2.54" length="middle" direction="pwr"/>+  <pin name="AIN0/IOUT/VBIAS" x="-30.48" y="-5.08" length="middle" direction="pas"/>+  <pin name="AIN1/IOUT/VBIAS" x="-30.48" y="-7.62" length="middle" direction="pas"/>+  <pin name="AIN2/IOUT/VBIAS/P1" x="-30.48" y="-10.16" length="middle" direction="pas"/>+  <pin name="AIN3/IOUT/VBIAS/P2" x="-30.48" y="-12.7" length="middle" direction="pas"/>+  <pin name="REFIN1_+" x="-30.48" y="-15.24" length="middle" direction="pas"/>+  <pin name="DOUT/RDY" x="30.48" y="12.7" length="middle" direction="out" rot="R180"/>+  <pin name="SYNC" x="30.48" y="10.16" length="middle" direction="in" rot="R180"/>+  <pin name="AVDD" x="30.48" y="7.62" length="middle" direction="pwr" rot="R180"/>+  <pin name="PSW" x="30.48" y="5.08" length="middle" direction="pas" rot="R180"/>+  <pin name="REGCAPA" x="30.48" y="2.54" length="middle" direction="out" rot="R180"/>+  <pin name="AVSS" x="30.48" y="0" length="middle" direction="pwr" rot="R180"/>+  <pin name="REFOUT" x="30.48" y="-2.54" length="middle" direction="out" rot="R180"/>+  <pin name="AIN7/IOUT/VBIAS/REFIN2" x="30.48" y="-5.08" length="middle" direction="pas" rot="R180"/>+  <pin name="AIN6/IOUT/VBIAS/REFIN2_+" x="30.48" y="-7.62" length="middle" direction="pas" rot="R180"/>+  <pin name="AIN5/IOUT/VBIAS" x="30.48" y="-10.16" length="middle" direction="pas" rot="R180"/>+  <pin name="AIN4/IOUT/VBIAS" x="30.48" y="-12.7" length="middle" direction="pas" rot="R180"/>+  <pin name="REFIN1" x="30.48" y="-15.24" length="middle" direction="pas" rot="R180"/> </symbol> </symbols> <devicesets> <deviceset name="AD7124-4BRUZ-RL" prefix="U">-  <description></description>+  <description>Analog Devices Analog To Digital Converters (ADCs), TSSOP-24. Pinout cross-checked by two models against the datasheet</description>   <gates>     <gate name="G$1" symbol="AD7124-4BRUZ-RL" x="0" y="0"/>   </gates>@@ -164,7 +165,17 @@         <connect gate="G$1" pin="AIN4/IOUT/VBIAS" pad="14"/>         <connect gate="G$1" pin="REFIN1" pad="13"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="AD7124-4BRUZ-RL" constant="no"/>+          <attribute name="MANUFACTURER" value="Analog Devices" constant="no"/>+          <attribute name="DATASHEET" value="https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-4.pdf" constant="no"/>+          <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/ad7124-4bruz-rl" constant="no"/>+          <attribute name="MOUSER_PN" value="584-AD7124-4BRUZ-RL" constant="no"/>+          <attribute name="DIGIKEY_PN" value="505-AD7124-4BRUZ-RLTR-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C650585" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>