component
AD7091R-5BCPZ
Public Made by Adomby adom
Analog Devices Analog To Digital Converters (ADCs), LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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AD7091R-5BCPZ
Analog Devices · Analog To Digital Converters (ADCs) · LFCSP-20(4x4)
AD7091R-5BCPZ from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply input with a range of 2.7 V to 5.25 V; decouple to GND. |
| 2 | REGCAP | passive | Decoupling pin for the internal regulator output; decouple separately to GND with a 2.2 µF capacitor. |
| 3 | REFIN/REFOUT | bidirectional | 2.5 V internal reference output or external reference input (1.0 V to VDD); decouple to GND, typically with 2.2 µF. |
| 4 | GND | power_in | Chip ground pin, ground reference for all circuitry on the device. |
| 5 | MUXOUT | output | Multiplexer output; tie directly to ADCIN if no external filtering or buffering is required, otherwise via a conditioning network. |
| 6 | VIN0 | input | Single-ended analog input for Channel 0 with an input range of 0 V to VREF. |
| 7 | VIN2 | input | Single-ended analog input for Channel 2 with an input range of 0 V to VREF. |
| 8 | ALERT/BUSY/GPO0 | output | Configuration-register selected open-drain output for ALERT (conversion result outside limits), BUSY (conversion in progress) or general-purpose output 0; needs external pull-up to VDRIVE. |
| 9 | GPO2 | output | General-purpose digital output 2. |
| 10 | VIN3 | input | Single-ended analog input for Channel 3 with an input range of 0 V to VREF. |
| 11 | VIN1 | input | Single-ended analog input for Channel 1 with an input range of 0 V to VREF. |
| 12 | ADCIN | input | Direct ADC input; tie directly to MUXOUT if no external filtering or buffering is required, otherwise connect to the conditioning network. |
| 13 | GND | power_in | Chip ground pin, ground reference for all circuitry on the device. |
| 14 | AS1 | input | I2C address bit 1; together with AS0 selects the device I2C address. |
| 15 | SDA | bidirectional | Serial data input/output, open-drain output that requires a pull-up resistor. |
| 16 | SCL | input | I2C serial clock input requiring a pull-up resistor, compatible with 100 kHz standard and 400 kHz fast modes. |
| 17 | CONVST/GPO1 | bidirectional | Edge-triggered convert start input (falling edge initiates a conversion) or, in command or autocycle mode, general-purpose digital output 1. |
| 18 | VDRIVE | power_in | Logic power supply input of 1.8 V to 5.25 V setting the interface voltage, must not exceed VDD by more than 0.3 V; decouple with 10 µF and 0.1 µF to GND. |
| 19 | AS0 | input | I2C address bit 0; together with AS1 selects the device I2C address. |
| 20 | RESET | input | Logic input that resets the device when pulled low. |
| 21 | EPAD | passive | Exposed pad, not connected internally; recommended to be soldered to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LFCSP-20(4x4) |
| Category | ADC/DAC/Data Conversion |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Integral Nonlinearity | INL | -1.25 | 0.8 | 1.25 | LSB | 3 | |
| Differential Nonlinearity | DNL | -0.9 | 0.3 | 0.9 | LSB | Guaranteed no missing codes to 12 bits | 3 |
| Offset Error | -1.5 | 0.3 | 1.5 | mV | TA = 25°C | 3 | |
| Offset Error Matching | -1.5 | 0.3 | 1.5 | mV | TA = 25°C | 3 | |
| Gain Error | -0.1 | 0 | 0.1 | % FS | TA = 25°C | 3 | |
| Gain Error Matching | -0.1 | 0 | 0.1 | % FS | TA = 25°C | 3 | |
| DC Leakage Current | -1 | 1 | µA | 3 | |||
| Internal Reference Output | REFOUT | 2.49 | 2.5 | 2.51 | V | Internal reference output, TA = 25°C | 3 |
| External Reference Input | REFIN | 1 | V | External reference input; max is VDD | 3 | ||
| Logic Input Current | IIN | -1 | 0.01 | 1 | µA | VIN = 0 V or VDRIVE | 3 |
| Logic Output Low Voltage | VOL | 0.4 | V | ISINK = 200 µA | 3 | ||
| Floating State Leakage Current | -1 | 1 | µA | 3 | |||
| Supply Voltage VDD | VDD | 2.7 | 5.25 | V | 3 | ||
| Logic Supply Voltage VDRIVE | VDRIVE | 1.8 | 5.25 | V | 3 | ||
| Operating Temperature | TA | -40 | 125 | °C | 3 | ||
| Serial clock frequency, standard mode | fSCL | 100 | kHz | Standard mode | 5 | ||
| Serial clock frequency, fast mode | fSCL | 400 | kHz | Fast mode | 5 | ||
| SCL high time, standard mode | t1 | 4 | µs | Standard mode | 5 | ||
| SCL high time, fast mode | t1 | 0.6 | µs | Fast mode | 5 | ||
| SCL low time, standard mode | t2 | 4.7 | µs | Standard mode | 5 | ||
| SCL low time, fast mode | t2 | 1.3 | µs | Fast mode | 5 | ||
| Data setup time, standard mode | t3 | 250 | ns | Standard mode | 5 | ||
| Data setup time, fast mode | t3 | 100 | ns | Fast mode | 5 | ||
| Data hold time, standard mode | t4 | 0 | 3.45 | µs | Standard mode | 5 | |
| Data hold time, fast mode | t4 | 0 | 0.9 | µs | Fast mode | 5 | |
| Bus-free time, standard mode | t7 | 4.7 | µs | Standard mode | 5 | ||
| Bus-free time, fast mode | t7 | 1.3 | µs | Fast mode | 5 | ||
| Spike pulse width suppressed | tSP | 0 | 50 | ns | Fast mode | 5 | |
| RESET pulse width | tRESETPW | 10 | ns | 5 | |||
| RESET pulse delay upon power-up | tRESET_DELAY | 50 | ns | 5 | |||
| VDD to GND | VDD | -0.3 | 7 | V | TA = 25°C | 6 | |
| VDRIVE to GND | VDRIVE | -0.3 | 7 | V | TA = 25°C | 6 | |
| Input Current to Any Pin Except Supplies | -10 | 10 | mA | Transient currents of up to 100 mA do not cause SCR latch-up | 6 | ||
| Operating Temperature Range | -40 | 125 | °C | 6 | |||
| Storage Temperature Range | -65 | 150 | °C | 6 | |||
| Junction Temperature | 150 | °C | 6 | ||||
| ESD HBM | 1.5 | kV | Human Body Model | 6 | |||
| ESD FICDM | 500 | V | Field Induced Charged Device Model | 6 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 52 | °C/W | 20-Lead LFCSP_WQ | 6 | ||
| Thermal Resistance Junction-to-Case | θJC | 6.5 | °C/W | 20-Lead LFCSP_WQ | 6 | ||
| Signal-to-Noise Ratio | SNR | 68 | dB | fIN = 1 kHz sine wave | 3 | ||
| Signal-to-Noise-and-Distortion Ratio | SINAD | 67 | dB | fIN = 1 kHz sine wave | 3 | ||
| Total Harmonic Distortion | THD | -80 | dB | fIN = 1 kHz sine wave | 3 | ||
| Spurious-Free Dynamic Range | SFDR | -81 | dB | fIN = 1 kHz sine wave | 3 | ||
| Channel to Channel Isolation | -105 | dB | fIN = 1 kHz sine wave | 3 | |||
| Offset Error Drift | 2 | ppm/°C | 3 | ||||
| Gain Error Drift | 1 | ppm/°C | 3 | ||||
| Reference Drift | 5 | ppm/°C | 3 | ||||
| Multiplexer On Resistance | 50 | Ω | VDD = 5.0 V | 3 | |||
| Reference Power-On Time | 50 | ms | CREF = 2.2 µF | 3 |
CAD (KiCad official)
- Symbol:
AD7091R-5BCPZ - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
- 3D model files:
ad7091r-5bcpz-etched.step/ad7091r-5bcpz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad7091r-5bcpz.step/ad7091r-5bcpz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (34 pp, sha256
09f7dfadd6f825a3, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).