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AD7091R-2BRUZ

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Analog Devices Analog To Digital Converters (ADCs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AD7091R-2BRUZ

Analog Devices · Analog To Digital Converters (ADCs) · TSSOP-16

AD7091R-2BRUZ from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip select input; when CS is held low the serial bus is enabled and CS frames the SPI output data.
2 RESET input Reset logic input for the device.
3 VDD power_in Power supply input with a range of 2.7 V to 5.25 V, to be decoupled to GND.
4 REGCAP passive Decoupling pin for the voltage output of the internal regulator, to be decoupled to GND with a 1.0 µF capacitor.
5 REFIN/REFOUT bidirectional Internal 2.5 V reference output to be decoupled to GND with typically 2.2 µF; an external reference from 1.0 V to VDD can be applied to this pin instead.
6 GND power_in Chip ground pin and ground reference point for all circuitry on the device.
7 MUXOUT output Multiplexer output that is tied directly to ADCIN if no external filtering or buffering is required.
8 VIN0 input Single-ended analog input with an input range of 0 V to VREF.
9 VIN1 input Single-ended analog input with an input range of 0 V to VREF.
10 ADCIN input ADC input giving access to the on-chip track-and-hold, tied directly to MUXOUT if no external conditioning is used.
11 GND power_in Chip ground pin and ground reference point for all circuitry on the device.
12 SDI input Serial data input for writing to the on-chip control registers, clocked in on the SCLK rising edge with MSB first.
13 SDO output Serial data output delivering conversion data MSB first on SCLK falling edges, with 13 SCLKs required to access the data.
14 SCLK input Serial clock input for the serial port interface.
15 CONVST input Edge-triggered convert start input; its falling edge places the track-and-hold into hold mode and initiates a conversion.
16 VDRIVE power_in Logic power supply input from 1.8 V to 5.25 V that sets the interface voltage, decoupled with 10 µF and 0.1 µF capacitors to GND.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSSOP-16
Category ADC/DAC/Data Conversion
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Signal-to-Noise Ratio SNR 66.5 70 dB fIN = 10 kHz sine wave 3
Signal-to-Noise-and-Distortion Ratio SINAD 65.5 69 dB fIN = 10 kHz sine wave 3
Integral Nonlinearity INL -1 0.7 1 LSB VDD ≥ 3.0 V 3
Integral Nonlinearity INL -1.25 0.8 1.25 LSB VDD ≥ 2.7 V 3
Differential Nonlinearity DNL -0.9 0.3 0.9 LSB Guaranteed no missing codes to 12 bits 3
Offset Error -1.5 0.2 1.5 mV TA = 25°C 3
Offset Error Matching -1.5 0.2 1.5 mV TA = 25°C 3
Gain Error -0.1 0 0.1 % FS TA = 25°C 3
Gain Error Matching -0.1 0 0.1 % FS TA = 25°C 3
Input Voltage Range 0 V At ADCIN 3
DC Leakage Current -1 1 µA 3
Internal Reference Output REFOUT 2.49 2.5 2.51 V Internal reference output, TA = 25°C 3
External Reference Input REFIN 1 V External reference input 3
Logic Input High Voltage VIH 0.7 × VDRIVE V 3
Logic Input Low Voltage VIL 0.3 × VDRIVE V 3
Input Current IIN -1 1 µA Typically 10 nA, VIN = 0 V or VDRIVE 3
Output Low Voltage VOL 0.4 V ISINK = 200 µA 3
Floating State Leakage Current -1 1 µA 3
Supply Voltage VDD VDD 2.7 5.25 V 1
Logic Supply Voltage VDRIVE VDRIVE 1.8 5.25 V 3
Operating Temperature Range TA -40 125 °C 7
VDD to GND VDD -0.3 7 V VDD to GND, TA = 25°C 7
VDRIVE to GND VDRIVE -0.3 7 V VDRIVE to GND, TA = 25°C 7
Analog Input Voltage to GND -0.3 V Maximum is VREF + 0.3 V 7
Digital Input Voltage to GND -0.3 V Maximum is VDRIVE + 0.3 V 7
Digital Output Voltage to GND -0.3 V Maximum is VDRIVE + 0.3 V 7
Input Current to Any Pin Except Supplies -10 10 mA Transient currents up to 100 mA do not cause SCR latch-up 7
Storage Temperature Range -65 150 °C 7
Junction Temperature 150 °C 7
ESD Human Body Model 1.5 kV HBM 7
ESD Field Induced Charged Device Model 500 V FICDM 7
Thermal Resistance Junction-to-Ambient θJA 106.03 °C/W 16-Lead TSSOP, device soldered in circuit board (worst case) 7
Thermal Resistance Junction-to-Case θJC 28.31 °C/W 16-Lead TSSOP 7

CAD (KiCad official)

  • Symbol: AD7091R-2BRUZ
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: ad7091r-2bruz-etched.step / ad7091r-2bruz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7091r-2bruz.step / ad7091r-2bruz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (39 pp, sha256 9c0395b23368e515, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF