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docs ad654jrz-reel7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
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ad654jrz-reel7-etched.fit.json ad654jrz-reel7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ad654jrz-reel7-etched.glb ad654jrz-reel7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
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page.json ad654jrz-reel7: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 21h ago
README.md ad654jrz-reel7: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 20d ago

AD654JRZ-REEL7

Analog Devices · V/F And F/V Converters · SOIC-8

AD654JRZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FOUT output Open-collector square-wave frequency output. Sinks >10 mA at <0.4 V saturation; requires an external pull-up resistor (RPU) to VLOGIC. Output current is internally limited to ~25 mA sustained.
2 LOGIC COMMON power_in Emitter reference for the open-collector output transistor. Can be tied to any level between -VS (or ground) and (+VS - 4 V), allowing direct interface to positive or negative logic families. Logic Common to -VS range: -500 mV to (+VS - 4 V).
3 RT passive Timing/scaling resistor node. External RT sets the 1 mA full-scale drive current from the input amplifier via VIN/(R1+R2). Maximum input voltage on this pin: -300 mV to +VS.
4 +VIN input Noninverting analog input to the internal op-amp/V-to-I converter. Input range: 0 to (+VS - 4 V) single-supply, or -VS to (+VS - 4 V) dual-supply. Input resistance 250 MΩ typ, input bias current 30 nA typ.
5 -VS power_in Negative supply pin. Tie to ground for single-supply operation (5 V to 36 V total), or to a negative rail for dual-supply operation (±5 V to ±18 V).
6 CT passive Timing capacitor terminal (one side of external CT). Together with pin 7 sets the full-scale oscillator frequency per f = V/(10·RC). Use low-DA capacitors (polystyrene, polypropylene, or Teflon) for best linearity.
7 CT passive Timing capacitor terminal (other side of external CT). Together with pin 6 sets the full-scale oscillator frequency per f = V/(10·RC).
8 +VS power_in Positive supply pin. Single-supply range 4.5 V to 36 V; dual-supply range +5 V to +18 V. Total supply +VS to -VS must not exceed 36 V. Quiescent current 2.0 mA typ.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Data Acquisition
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • AD654JRZ-REEL7
  • AD654JRZ-REEL7JN
  • AD654JRZ-REEL7JNZ

CAD (KiCad official)

  • Symbol: AD654JRZ-REEL7
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad654jrz-reel7-etched.step / ad654jrz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad654jrz-reel7.step / ad654jrz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 10e9b378fefec99b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF