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page.json ad623arz-rl: specified limits as data (metadata.characteristics, 43 rows from the datasheet) · Ray 18d ago
README.md ad623arz-rl: specified limits as data (metadata.characteristics, 43 rows from the datasheet) · Ray 18d ago

AD623ARZ-RL

Analog Devices · Instrumentation Amplifiers · SOIC-8

AD623ARZ-RL from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 -RG passive Inverting terminal of external gain-setting resistor RG for programming instrumentation amplifier gain from 1 to 1000.
2 -IN input Inverting input terminal with common-mode input voltage range from (−VS − 0.15V) to (+VS − 1.5V).
3 +IN input Noninverting input terminal with common-mode input voltage range from (−VS − 0.15V) to (+VS − 1.5V).
4 -VS power_in Negative supply terminal for dual-supply operation (−2.5V to −6V) or single-supply operation (0V ground).
5 REF input Output reference input terminal establishing output common-mode voltage with 100 kΩ input impedance, accepting voltages from −VS to +VS.
6 OUTPUT output Output terminal providing rail-to-rail swing with output voltage swing of 0.2V to (+VS − 0.5V) at RL = 10 kΩ.
7 +VS power_in Positive supply terminal for dual-supply operation (+2.5V to +6V) or single-supply operation (+2.7V to +12V).
8 +RG passive Noninverting terminal of external gain-setting resistor RG for programming instrumentation amplifier gain from 1 to 1000.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gain range G 1 1000 G = 1 + (100 kΩ/RG) 3
Gain error, G = 1 0.03 0.1 % G = 1; VOUT = 0.15 V to 3.5 V 3
Gain error, G = 10 0.1 0.35 % G > 1; VOUT = 0.15 V to 4.5 V 3
Gain error, G = 100 0.1 0.35 % G > 1; VOUT = 0.15 V to 4.5 V 3
Gain error, G = 1000 0.1 0.35 % G > 1; VOUT = 0.15 V to 4.5 V 3
Nonlinearity, G = 1 to 1000 50 ppm G = 1: VOUT = 0.15 V to 3.5 V; G > 1: VOUT = 0.15 V to 4.5 V 3
Gain vs. temperature, G = 1 5 10 ppm/°C G = 1 3
Gain vs. temperature, G > 1 50 ppm/°C G > 1 3
Input offset voltage, VOSI VOSI 25 200 µV 3
Input offset voltage over temperature VOSI 350 650 µV Over temperature 3
Input offset voltage average tempco VOSI 0.1 2 µV/°C 3
Output offset voltage, VOSO VOSO 200 1000 µV 3
Output offset voltage over temperature VOSO 1500 2600 µV Over temperature 3
Output offset voltage average tempco VOSO 2.5 10 µV/°C 3
Offset referred to input vs. supply (PSR), G = 1 80 100 dB G = 1 3
Offset referred to input vs. supply (PSR), G = 10 100 120 dB G = 10 3
Offset referred to input vs. supply (PSR), G = 100 100 130 dB G = 100 3
Offset referred to input vs. supply (PSR), G = 1000 100 130 dB G = 1000 3
Input bias current IB 17 25 nA 3
Input bias current over temperature IB 27.5 nA Over temperature 3
Input bias current average tempco IB 25 pA/°C 3
Input offset current IOS 0.25 2 nA 3
Input offset current over temperature IOS 2.5 nA Over temperature 3
Input offset current average tempco IOS 5 pA/°C 3
Common-mode rejection, G = 1 CMRR 70 80 dB VCM = 0 V to 3 V; at 60 Hz with 1 kΩ source imbalance 4
Common-mode rejection, G = 10 CMRR 90 100 dB VCM = 0 V to 3 V; at 60 Hz with 1 kΩ source imbalance 4
Common-mode rejection, G = 100 CMRR 105 110 dB VCM = 0 V to 3 V; at 60 Hz with 1 kΩ source imbalance 4
Common-mode rejection, G = 1000 CMRR 105 110 dB VCM = 0 V to 3 V; at 60 Hz with 1 kΩ source imbalance 4
Common-mode rejection, G = 1 (dual supply) CMRR 70 80 dB VCM = +3.5 V to −5.15 V; at 60 Hz with 1 kΩ source imbalance 6
Common-mode rejection, G = 10 (dual supply) CMRR 90 100 dB VCM = +3.5 V to −5.15 V; at 60 Hz with 1 kΩ source imbalance 6
Common-mode rejection, G = 100 (dual supply) CMRR 105 110 dB VCM = +3.5 V to −5.15 V; at 60 Hz with 1 kΩ source imbalance 6
Common-mode rejection, G = 1000 (dual supply) CMRR 105 110 dB VCM = +3.5 V to −5.15 V; at 60 Hz with 1 kΩ source imbalance 6
Reference input resistance tolerance RIN -20 20 % 4
Reference input resistance RIN 100 kΩ 4
Input current at reference IIN 50 60 µA VIN+, VREF = 0 V 4
Operating range, dual supply VS 2.5 6 V Dual supply (±VS) 4
Supply voltage 12 V 8
Internal power dissipation 650 mW Device in free air 8
Differential input voltage -6 6 V 8
Storage temperature range -65 125 °C 8
Operating temperature range -40 85 °C 8
Lead temperature (soldering) 300 °C Soldering, 10 sec 8
Thermal resistance, junction-to-ambient (θJA) θJA 155 °C/W 8-lead SOIC package; device in free air 8

CAD (KiCad official)

  • Symbol: AD623ARZ-RL
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ad623arz-rl-etched.step / ad623arz-rl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad623arz-rl.step / ad623arz-rl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (26 pp, sha256 02310884590763f2, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF