AD586JNZ from Analog Devices, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TP1	unconnected	Factory trim pad (internal test point); make no connections to this pin other than a dummy PCB pad.
2	VIN	power_in	Input voltage supply; the absolute maximum VIN to ground is 36 V and the device requires less than 3 mA quiescent current from a 12 V or 15 V supply.
3	TP1	unconnected	Factory trim pad (internal test point); make no connections to this pin other than a dummy PCB pad.
4	GND	power_in	Ground reference; the device produces its 5 V output at pin 6 when pin 2 is powered and pin 4 is grounded.
5	TRIM	passive	Optional external fine trim input; the trim circuit in Figure 6 (10 kΩ) can offset the output by as much as 300 mV with minimal effect on other characteristics.
6	VOUT	power_out	5 V output voltage; the output can source or sink 10 mA and is safe for indefinite short to ground or VIN.
7	TP1	unconnected	Factory trim pad (internal test point); make no connections to this pin other than a dummy PCB pad.
8	NOISE REDUCTION	passive	Optional noise reduction filter pin; an external 1 µF capacitor to ground reduces the Zener noise contribution (3 dB point near 12 Hz, high-frequency noise reduced to about 160 µV p-p).

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	PDIP-8
Category	Power Management
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Output voltage	VOUT	4.98		5.02	V	TA = 25°C, VIN = 15 V	3
Output voltage drift				25	ppm/°C	0°C to 70°C	3
Gain adjustment		-2		6	%		3
Line regulation		-100		100	µV/V	10.8 V < +VIN < 36 V, TMIN to TMAX	3
Load regulation, sourcing				100	µV/mA	0 mA < IOUT < 10 mA, 25°C	3
Load regulation, sinking				400	µV/mA	−10 mA < IOUT < 0 mA, 25°C	3
Quiescent current			2	3	mA	TA = 25°C, VIN = 15 V	3
Power consumption			30		mW	TA = 25°C, VIN = 15 V	3
Output noise, 0.1 Hz to 10 Hz			4		µV p-p	0.1 Hz to 10 Hz	3
Output noise spectral density			100		nV/√Hz	Spectral Density, 100 Hz	3
Long-term stability			15		ppm/1000 hr		3
Short-circuit current-to-ground		45		60	mA		3
Specified performance temperature range		0		70	°C	Specified performance (J grade)	3
Operating performance temperature range		-40		85	°C	Operating performance	3
VIN to ground	VIN			36	V		5
Power dissipation	PD			500	mW	25°C	5
Storage temperature		-65		150	°C		5
Lead temperature (soldering, 10 sec)				300	°C	Soldering, 10 sec	5
Package thermal resistance, junction-to-case	θJC		22		°C/W		5
Package thermal resistance, junction-to-ambient	θJA		110		°C/W		5

CAD (KiCad official)

Symbol: AD586JNZ
Footprint: Package_DIP:DIP-8_W7.62mm
3D model: PDIP-8 (KiCad packages3D, STEP)
3D model files: ad586jnz-etched.step / ad586jnz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad586jnz.step / ad586jnz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (16 pp, sha256 e0fe4ad99ffe1bcf, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD586JNZ

Verified AD586JNZ

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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