component
AD5725ARSZ-1500RL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Analog Devices Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "AD5725ARSZ-1500RL7",
"manufacturer": "Analog Devices",
"package": "SSOP-28",
"pin_count": 28,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5725.pdf",
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"digikey": "AD5725ARSZ-1500RL7TR-ND",
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"pins": [
{
"number": "1",
"name": "VREFP",
"type": "input",
"description": "Positive DAC reference input that defines the full-scale output voltage, with an allowable range of AVDD − 2.5 V to VREFN + 2.5 V."
},
{
"number": "2",
"name": "VOUTB",
"type": "output",
"description": "Buffered analog output voltage of DAC B."
},
{
"number": "3",
"name": "VOUTA",
"type": "output",
"description": "Buffered analog output voltage of DAC A."
},
{
"number": "4",
"name": "AVSS",
"type": "power_in",
"description": "Negative analog supply pin, with voltage ranging from 0 V to −15 V."
},
{
"number": "5",
"name": "DGND",
"type": "power_in",
"description": "Digital ground pin."
},
{
"number": "6",
"name": "CLR",
"type": "input",
"description": "Active-low input that sets the input and DAC registers to zero scale (0x000) for the AD5725-1 or midscale (0x800) for the AD5725."
},
{
"number": "7",
"name": "LDAC",
"type": "input",
"description": "Active-low load DAC input; taking it low while CS is high updates all output registers simultaneously, with a minimum pulse width of 10 ns."
},
{
"number": "8",
"name": "DB0",
"type": "bidirectional",
"description": "Data bit 0 (LSB) of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "9",
"name": "DB1",
"type": "bidirectional",
"description": "Data bit 1 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "10",
"name": "DB2",
"type": "bidirectional",
"description": "Data bit 2 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "11",
"name": "DB3",
"type": "bidirectional",
"description": "Data bit 3 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "12",
"name": "DB4",
"type": "bidirectional",
"description": "Data bit 4 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "13",
"name": "DB5",
"type": "bidirectional",
"description": "Data bit 5 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "14",
"name": "DB6",
"type": "bidirectional",
"description": "Data bit 6 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "15",
"name": "DB7",
"type": "bidirectional",
"description": "Data bit 7 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "16",
"name": "DB8",
"type": "bidirectional",
"description": "Data bit 8 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "17",
"name": "DB9",
"type": "bidirectional",
"description": "Data bit 9 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "18",
"name": "DB10",
"type": "bidirectional",
"description": "Data bit 10 of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "19",
"name": "DB11",
"type": "bidirectional",
"description": "Data bit 11 (MSB) of the 12-bit parallel data bus used for writing and reading back data."
},
{
"number": "20",
"name": "R/W",
"type": "input",
"description": "Read/write pin that is active low to write data to the DAC and active high to read back data on the data bit pins when VL is connected to +5 V."
},
{
"number": "21",
"name": "A1",
"type": "input",
"description": "Address bit 1, which together with A0 selects DAC register A (00) through D (11)."
},
{
"number": "22",
"name": "A0",
"type": "input",
"description": "Address bit 0, which together with A1 selects DAC register A (00) through D (11)."
},
{
"number": "23",
"name": "CS",
"type": "input",
"description": "Active-low chip select pin that enables decoding of the write and read operations."
},
{
"number": "24",
"name": "VL",
"type": "power_in",
"description": "Voltage supply for the readback function that sets the digital output level, normally connected to +5 V; it can be left open-circuit if readback is not used."
},
{
"number": "25",
"name": "AVDD",
"type": "power_in",
"description": "Positive analog supply pin, with voltage ranging from +5 V to +15 V."
},
{
"number": "26",
"name": "VOUTD",
"type": "output",
"description": "Buffered analog output voltage of DAC D."
},
{
"number": "27",
"name": "VOUTC",
"type": "output",
"description": "Buffered analog output voltage of DAC C."
},
{
"number": "28",
"name": "VREFN",
"type": "input",
"description": "Negative DAC reference input that defines the zero-scale output voltage, with an allowable range of AVSS to VREFP − 2.5 V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
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"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: CLR mapping conflicts within the datasheet. Table 6 (page 9) says CLR sets zero scale (0x000) for th"
],
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"at": "2026-10-28T15:56:21"
},
"datasheet": {
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"pages": 20,
"sha256": "2545781af3caf455",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
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"described": 28,
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