component
AD5700-1BCPZ-RL7
Public Made by Adomby adom
Analog Devices Interface - Specialized, LFCSP-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownAD5700-1BCPZ-RL7
Analog Devices · Interface - Specialized · LFCSP-24(4x4)
AD5700-1BCPZ-RL7 from Analog Devices, in a LFCSP-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | XTAL_EN | input | Crystal circuit enable; low level enables external crystal and requires external crystal, high level disables crystal and provides clock from external source or internal oscillator (AD5700-1 only). |
| 2 | CLKOUT | output | Clock output pin; configurable for clock output when using crystal or internal RC oscillator. |
| 3 | CLK_CFG0 | input | Clock configuration control pin; see table 7 for configuration options. |
| 4 | CLK_CFG1 | input | Clock configuration control pin; see table 7 for configuration options. |
| 5 | RESET | input | Low active digital input that places AD5700/AD5700-1 in power-down mode when low; device returns to power-up state when RESET goes high. |
| 6 | CD | output | Carrier detection digital output; high level indicates valid carrier detected. |
| 7 | TXD | input | Transmit data digital input providing data input to the modulator. |
| 8 | RTS | input | Request to send digital input; high level enables demodulator and disables modulator, low level enables modulator and disables demodulator. |
| 9 | DUPLEX | input | Full-duplex enable control; high level enables simultaneous modulator and demodulator operation, low level disables this function. |
| 10 | RXD | output | Receive data UART digital output allowing access to demodulator data output. |
| 11 | IOVCC | power_in | Digital interface power supply accepting 1.71V to 5.5V voltage; digital threshold levels reference this pin and must be decoupled to ground with 10µF and 0.1µF capacitors. |
| 12 | DGND | power_in | Digital circuit ground reference connection; recommended to connect to AGND for typical operation. |
| 13 | REG_CAP | passive | Internal voltage regulator capacitor connection; requires 1µF capacitor connected between this pin and ground. |
| 14 | HART_OUT | output | HART FSK signal output with DC bias at 0.75V and 459-505 mV peak-to-peak amplitude; should be AC coupled to load with capacitor. |
| 15 | REF | passive | Internal 1.5V reference voltage output or external 2.5V reference voltage input; requires 1µF capacitor connected to ground. |
| 16 | HART_IN | input | HART FSK signal input for internal filter configuration; requires AC coupling with 2.2nF series capacitor from HART signal source. |
| 17 | ADC_IP | input | ADC input pin for external bandpass filtered HART signal input or direct ADC connection when using external bandpass filter; requires 680pF capacitor to ground when using internal filter. |
| 18 | VCC | power_in | Power supply input pin accepting 2V to 5.5V voltage; should be decoupled to ground with 10µF and 0.1µF low ESR capacitors. |
| 19 | AGND | power_in | Analog circuit ground reference connection; recommended for typical operation. |
| 20 | XTAL2 | passive | External 3.6864MHz crystal connection or external clock source input; ground this pin if using internal RC oscillator or external CMOS clock. |
| 21 | XTAL1 | passive | External 3.6864MHz crystal connection or external clock source input; ground this pin if using internal RC oscillator. |
| 22 | DGND | power_in | Digital circuit ground reference connection; recommended to connect to AGND for typical operation. |
| 23 | REF_EN | input | Reference voltage source enable control; high level enables internal 1.5V reference source and buffer, low level disables and requires external 2.5V reference at REF pin with VCC minimum 2.7V. |
| 24 | FILTER_SEL | input | Bandpass filter selection control; high level enables internal filter with HART signal applied to HART_IN, low level disables internal filter requiring external bandpass filter network at ADC_IP. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LFCSP-24(4x4) |
| Category | Interface |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
AD5700-1BCPZ-RL7 - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: LFCSP-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
ad5700-1bcpz-rl7-etched.step/ad5700-1bcpz-rl7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5700-1bcpz-rl7.step/ad5700-1bcpz-rl7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
216f1e538d52010b, retrieved 2026-09-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).