component
AD5700-1ACPZ-RL7
Public Made by Adomby adom
Analog Devices Interface - Specialized, LFCSP-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownAD5700-1ACPZ-RL7
Analog Devices · Interface - Specialized · LFCSP-24(4x4)
AD5700-1ACPZ-RL7 from Analog Devices, in a LFCSP-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | XTAL_EN | input | Active-low digital input to enable external crystal circuit; high level disables crystal for external clock or internal oscillator. |
| 2 | CLKOUT | output | Clock output configurable to 3.6864 MHz, 1.8432 MHz, or 1.2288 MHz based on CLK_CFG pins when crystal or internal oscillator enabled. |
| 3 | CLK_CFG0 | input | Clock configuration control pin used with CLK_CFG1 and XTAL_EN to select clock source per Table 7. |
| 4 | CLK_CFG1 | input | Clock configuration control pin used with CLK_CFG0 and XTAL_EN to select clock source per Table 7. |
| 5 | RESET | input | Active-low digital input places device in power-down mode (16 μA typical); high restores normal operation. |
| 6 | CD | output | Carrier detect digital output; high indicates valid HART carrier signal detected with threshold 85-110 mV p-p. |
| 7 | TXD | input | Transmit data digital input to FSK modulator for 1.2 kHz (mark/1) or 2.2 kHz (space/0) encoding. |
| 8 | RTS | input | Request to send digital input; low enables modulator and disables demodulator; high enables demodulator. |
| 9 | DUPLEX | input | Full-duplex operation enable; high enables simultaneous modulation and demodulation. |
| 10 | RXD | output | Receive data digital output from UART interface with recovered HART data from demodulator. |
| 11 | IOVCC | power_in | Digital interface power supply; voltage range 1.71 V to 5.5 V; decouple with 10 μF and 0.1 μF capacitors to ground. |
| 12 | DGND | power_in | Digital circuit ground reference; connect to AGND for typical operation. |
| 13 | REG_CAP | passive | Capacitor connection to internal voltage regulator; connect 1 μF capacitor to ground. |
| 14 | HART_OUT | output | HART FSK signal output; 459-505 mV p-p with 160 Ω load; DC biased at 0.75 V; AC coupled to external load. |
| 15 | REF | bidirectional | Internal 1.5 V reference output (REF_EN high) or external 2.5 V reference input (REF_EN low, VCC > 2.7 V); 1 μF capacitor to ground. |
| 16 | HART_IN | input | HART FSK input for internal filter mode; AC couple via 2.2 nF series capacitor from HART signal source. |
| 17 | ADC_IP | input | ADC input; connect 680 pF for internal filter or external band-pass filter output for external filter mode. |
| 18 | VCC | power_in | Power supply input; voltage range 2 V to 5.5 V; decouple with 10 μF and 0.1 μF capacitors to ground. |
| 19 | AGND | power_in | Analog circuit ground reference; connect to DGND for typical operation. |
| 20 | XTAL2 | input | External 3.6864 MHz crystal oscillator connection pin; leave open for internal oscillator or external CMOS clock modes. |
| 21 | XTAL1 | input | External 3.6864 MHz crystal connection or external CMOS clock source input; ground for internal oscillator mode. |
| 22 | DGND | power_in | Digital circuit ground reference; connect to AGND for typical operation. |
| 23 | REF_EN | input | Reference enable; high enables internal 1.5 V reference; low requires external 2.5 V reference at REF and VCC > 2.7 V. |
| 24 | FILTER_SEL | input | Filter select; high enables internal filter with signal to HART_IN; low enables external filter with signal to ADC_IP. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LFCSP-24(4x4) |
| Category | Interface |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
AD5700-1ACPZ-RL7 - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: LFCSP-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
ad5700-1acpz-rl7-etched.step/ad5700-1acpz-rl7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5700-1acpz-rl7.step/ad5700-1acpz-rl7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
216f1e538d52010b, retrieved 2026-09-21, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).