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AD5696RARUZ
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Analog Devices Digital To Analog Converters (DACs), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD5696RARUZ
Analog Devices · Digital To Analog Converters (DACs) · TSSOP-16
AD5696RARUZ from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VREF | power_in | Common reference pin that is the reference output when the internal 2.5 V reference is used (the default) and the reference input when an external reference is used. |
| 2 | VOUTB | output | Analog output voltage from DAC B, with a rail-to-rail output amplifier. |
| 3 | VOUTA | output | Analog output voltage from DAC A, with a rail-to-rail output amplifier. |
| 4 | GND | power_in | Ground reference point for all circuitry on the part. |
| 5 | VDD | power_in | Power supply input operable from 2.7 V to 5.5 V, to be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND. |
| 6 | VOUTC | output | Analog output voltage from DAC C, with a rail-to-rail output amplifier. |
| 7 | VOUTD | output | Analog output voltage from DAC D, with a rail-to-rail output amplifier. |
| 8 | SDA | bidirectional | Open-drain serial data line used with SCL to clock data into or out of the 24-bit input shift register, to be pulled up to the supply with an external resistor. |
| 9 | LDAC | input | Pulsing low updates any or all DAC registers from their input registers simultaneously, and the pin can be tied permanently low. |
| 10 | GAIN | input | Span select: tying to GND sets all four DAC outputs to 0 V to VREF, and tying to VLOGIC sets them to 0 V to 2 × VREF. |
| 11 | VLOGIC | power_in | Digital power supply with a voltage range of 1.62 V to 5.5 V. |
| 12 | A0 | input | Address input that sets the first LSB of the 7-bit slave address. |
| 13 | SCL | input | Serial clock line used with SDA to clock data into or out of the 24-bit input register. |
| 14 | A1 | input | Address input that sets the second LSB of the 7-bit slave address. |
| 15 | RESET | input | Falling-edge-sensitive asynchronous reset; while low, LDAC pulses are ignored, and on activation the input and DAC registers load zero scale or midscale per RSTSEL. |
| 16 | RSTSEL | input | Power-on reset select: tying to GND powers all four DACs up at zero scale, and tying to VLOGIC powers them up at midscale. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-16 |
| Category | ADC/DAC/Data Conversion |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy (INL), AD5696R, Gain = 2 | -8 | 2 | 8 | LSB | Gain = 2 | 3 | |
| Relative Accuracy (INL), AD5696R, Gain = 1 | -8 | 2 | 8 | LSB | Gain = 1 | 3 | |
| Differential Nonlinearity, AD5696R | -1 | 1 | LSB | Guaranteed monotonic by design | 3 | ||
| Zero-Code Error | 0.4 | 4 | mV | All zeros loaded to DAC register | 3 | ||
| Offset Error | -4 | 0.1 | 4 | mV | 3 | ||
| Full-Scale Error | -0.2 | 0.01 | 0.2 | % of FSR | All ones loaded to DAC register | 3 | |
| Gain Error | -0.2 | 0.02 | 0.2 | % of FSR | 3 | ||
| Total Unadjusted Error | -0.25 | 0.01 | 0.25 | % of FSR | External reference; gain = 2; TSSOP | 3 | |
| Total Unadjusted Error | -0.25 | 0.25 | % of FSR | Internal reference; gain = 1; TSSOP | 3 | ||
| Output Voltage Range (gain = 1) | 0 | V | Gain = 1 | 3 | |||
| Output Voltage Range (gain = 2) | 0 | V | Gain = 2, see Figure 30 | 3 | |||
| Output Voltage (internal reference) | 2.4975 | 2.5025 | V | At ambient | 4 | ||
| Reference Temperature Coefficient | 5 | 20 | ppm/°C | See the Terminology section | 4 | ||
| Output Current Load Capability | -5 | 5 | mA | VDD ≥ 3 V | 4 | ||
| Input Current | -2 | 2 | μA | Per pin | 4 | ||
| Output Low Voltage | VOL | 0.4 | V | ISINK = 3 mA | 4 | ||
| VLOGIC Supply Voltage | VLOGIC | 1.62 | 5.5 | V | 4 | ||
| VDD Supply Voltage, Gain = 1 | VDD | 2.7 | 5.5 | V | Gain = 1 | 4 | |
| VDD Supply Voltage, Gain = 2 | VDD | 5.5 | V | Gain = 2 | 4 | ||
| Normal Mode Supply Current | IDD | 0.59 | 0.7 | mA | Internal reference off | 4 | |
| Normal Mode Supply Current | IDD | 1.1 | 1.3 | mA | Internal reference on, at full scale | 4 | |
| All Power-Down Modes Supply Current | IDD | 1 | 4 | μA | −40°C to +85°C | 4 | |
| All Power-Down Modes Supply Current | IDD | 6 | μA | −40°C to +105°C | 4 | ||
| Output Voltage Settling Time, AD5696R | 5 | 8 | µs | ¼ to ¾ scale settling to ±2 LSB | 5 | ||
| VDD to GND | VDD | -0.3 | 7 | V | 7 | ||
| VLOGIC to GND | VLOGIC | -0.3 | 7 | V | 7 | ||
| VOUT to GND | VOUT | -0.3 | V | 7 | |||
| VREF to GND | VREF | -0.3 | V | 7 | |||
| Digital Input Voltage to GND | -0.3 | V | Excluding SDA and SCL | 7 | |||
| SDA and SCL to GND | -0.3 | 7 | V | 7 | |||
| Operating Temperature Range | -40 | 105 | °C | 7 | |||
| Storage Temperature Range | -65 | 150 | °C | 7 | |||
| Junction Temperature | 125 | °C | 7 | ||||
| Reflow Soldering Peak Temperature, Pb Free | 260 | °C | J-STD-020 | 7 | |||
| tHD,DAT, data hold time | t6 | 0 | 0.9 | μs | 6 | ||
| tR, rise time of SCL and SDA when receiving | t10 | 0 | 300 | ns | 6 | ||
| tF, fall time of SDA and SCL | t11 | 300 | ns | 6 | |||
| Pulse width of suppressed spike | tSP | 0 | 50 | ns | 6 | ||
| Thermal Impedance, junction to ambient, TSSOP | θJA | 112.6 | °C/W | 0 airflow (4-layer board) | 7 |
CAD (KiCad official)
- Symbol:
AD5696RARUZ - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
ad5696raruz-etched.step/ad5696raruz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5696raruz.step/ad5696raruz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (29 pp, sha256
606267c8d0d475b1, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).