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Ray Publish 0.1.0 78ed3b3 3d ago
{
  "slug": "ad5687bcpz-rl7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Digital To Analog Converters (DACs), LFCSP-16(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "ad5687bcpz-rl7",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ad5687bcpz-rl7.kicad_sym",
    "ad5687bcpz-rl7.kicad_mod",
    "ad5687bcpz-rl7.glb",
    "ad5687bcpz-rl7.step",
    "ad5687bcpz-rl7.lbr",
    "docs/hero.png",
    "docs/ad5687bcpz-rl7-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ad5687bcpz-rl7-hero.glb",
    "ad5687bcpz-rl7-hero.overlay.json",
    "ad5687bcpz-rl7-etched.glb"
  ],
  "component": {
    "mpn": "AD5687BCPZ-RL7",
    "manufacturer": "Analog Devices",
    "package": "LFCSP-16(3x3)",
    "pin_count": 17,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5689_5687.pdf",
    "parts": {
      "symbol": "ad5687bcpz-rl7.kicad_sym",
      "footprint": "ad5687bcpz-rl7.kicad_mod",
      "model_3d": "ad5687bcpz-rl7-hero.glb",
      "model_3d_plain": "ad5687bcpz-rl7-etched.glb",
      "model_3d_step": "ad5687bcpz-rl7-etched.step",
      "model_3d_step_plain": "ad5687bcpz-rl7.step",
      "lbr": "ad5687bcpz-rl7.lbr"
    },
    "distributor_links": {
      "lcsc": "C650111",
      "digikey": "505-AD5687BCPZ-RL7TR-ND",
      "mouser": "584-AD5687BCPZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T20:56:35Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-AD5687BCPZ-RL7TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-AD5687BCPZ-R7",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VOUTA",
        "type": "output",
        "description": "Analog output voltage from DAC A; the output amplifier has rail-to-rail operation."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference point for all circuitry on the device."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "Power supply input operable from 2.7 V to 5.5 V; decouple with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND."
      },
      {
        "number": "4",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; do not connect to this pin."
      },
      {
        "number": "5",
        "name": "VOUTB",
        "type": "output",
        "description": "Analog output voltage from DAC B; the output amplifier has rail-to-rail operation."
      },
      {
        "number": "6",
        "name": "SDO",
        "type": "output",
        "description": "Serial data output used for daisy-chaining or readback; data is transferred on the SCLK rising edge and is valid on the falling edge."
      },
      {
        "number": "7",
        "name": "LDAC",
        "type": "input",
        "description": "Asynchronous or synchronous DAC update control; pulsing low updates DAC registers that have new input data, and the pin can be tied permanently low."
      },
      {
        "number": "8",
        "name": "GAIN",
        "type": "input",
        "description": "Gain select; tying to GND gives a 0 V to VREF output span, and tying to VLOGIC gives a 0 V to 2 × VREF span."
      },
      {
        "number": "9",
        "name": "VLOGIC",
        "type": "power_in",
        "description": "Digital power supply with a voltage range of 1.62 V to 5.5 V."
      },
      {
        "number": "10",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input; data is clocked into the input shift register on the falling edge at rates up to 50 MHz."
      },
      {
        "number": "11",
        "name": "SYNC",
        "type": "input",
        "description": "Active-low frame synchronization input; when it goes low, data is transferred in on the falling edges of the next 24 clocks."
      },
      {
        "number": "12",
        "name": "SDIN",
        "type": "input",
        "description": "Serial data input to a 24-bit input shift register, clocked in on the falling edge of SCLK."
      },
      {
        "number": "13",
        "name": "RESET",
        "type": "input",
        "description": "Asynchronous reset input, falling-edge sensitive; when low, LDAC pulses are ignored, and activation loads the input and DAC registers with zero scale or midscale per RSTSEL."
      },
      {
        "number": "14",
        "name": "RSTSEL",
        "type": "input",
        "description": "Power-on reset select; tying to GND powers both DACs up to zero scale, and tying to VLOGIC powers them up to midscale."
      },
      {
        "number": "15",
        "name": "VREF",
        "type": "power_in",
        "description": "Reference input voltage for the DACs."
      },
      {
        "number": "16",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; do not connect to this pin."
      },
      {
        "number": "17",
        "name": "EPAD",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-function table text shows the mnemonics with extraction artifacts (ALDACE, ASYNCE, ARESETE).; The exposed pad is listed as pin 17 in Table 7 (LFCSP column) but is not a numbered pin on the packa; The datasheet pin description for VREF only says 'Reference Input Voltage'; no limits are given in t",
          "exposed pad 17 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 8,
        "cost_usd": 0.0594,
        "at": "2026-10-30T20:56:21"
      },
      "datasheet": {
        "url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5689_5687.pdf",
        "pages": 24,
        "sha256": "af1dd912a1b64dd7",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 17,
        "described": 17,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ad5687bcpz-rl7.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          3.0,
          0.785
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3eb81ffac423a66cdcfead8efe56401da171edaf1f2257049aad7b2d3900f6c8",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ad5687bcpz-rl7-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          3.0,
          0.785
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d4c08d42f7ce2b9b6ee08be67e7044c7aaeb35c0c57c49aa56f6d441fc526c65",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "CP-16-22",
      "source_page": 24,
      "D": {
        "nom_mm": 3.0,
        "range_mm": [
          2.9,
          3.1
        ]
      },
      "E1": {
        "nom_mm": 3.0,
        "range_mm": [
          2.9,
          3.1
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.75,
        "range_mm": [
          0.7,
          0.8
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "ad5687bcpz-rl7.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}