component
AD5672RBCPZ-REEL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"description": "Analog Devices Digital To Analog Converters (DACs), LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "AD5672RBCPZ-REEL7",
"manufacturer": "Analog Devices",
"package": "LFCSP-20(4x4)",
"pin_count": 21,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5672R_5676R.pdf",
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"distributor_links": {
"lcsc": "C650032",
"digikey": "505-AD5672RBCPZ-REEL7TR-ND",
"mouser": "584-AD5672RBCPZ-RL7"
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"source": "Component Ocean /api/assign-pns",
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"pn": "505-AD5672RBCPZ-REEL7TR-ND",
"status": "found"
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},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Power supply input; the device operates from 2.7 V to 5.5 V and VDD should be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND."
},
{
"number": "2",
"name": "VLOGIC",
"type": "power_in",
"description": "Digital power supply; the voltage on this pin ranges from 1.62 V to 5.5 V."
},
{
"number": "3",
"name": "SYNC",
"type": "input",
"description": "Active-low frame synchronization input; when SYNC goes low, data transfers in on the falling edges of the next 24 clocks."
},
{
"number": "4",
"name": "SCLK",
"type": "input",
"description": "Serial clock input; data is clocked into the input shift register on the falling edge of SCLK at rates of up to 50 MHz."
},
{
"number": "5",
"name": "SDI",
"type": "input",
"description": "Serial data input to the 24-bit input shift register, clocked in on the falling edge of SCLK."
},
{
"number": "6",
"name": "VOUT7",
"type": "output",
"description": "Analog output voltage from DAC 7; the output amplifier has rail-to-rail operation."
},
{
"number": "7",
"name": "VOUT6",
"type": "output",
"description": "Analog output voltage from DAC 6; the output amplifier has rail-to-rail operation."
},
{
"number": "8",
"name": "VOUT5",
"type": "output",
"description": "Analog output voltage from DAC 5; the output amplifier has rail-to-rail operation."
},
{
"number": "9",
"name": "VOUT4",
"type": "output",
"description": "Analog output voltage from DAC 4; the output amplifier has rail-to-rail operation."
},
{
"number": "10",
"name": "NIC",
"type": "unconnected",
"description": "No internal connection."
},
{
"number": "11",
"name": "GND",
"type": "power_in",
"description": "Ground reference point for all circuitry on the device."
},
{
"number": "12",
"name": "LDAC",
"type": "input",
"description": "Load DAC input; pulsing low updates any or all DAC registers that have new input data so all outputs update simultaneously, and the pin can be tied permanently low."
},
{
"number": "13",
"name": "SDO",
"type": "output",
"description": "Serial data output used for daisy-chaining or readback; data transfers on the rising edge of SCLK and is valid on the falling edge."
},
{
"number": "14",
"name": "RESET",
"type": "input",
"description": "Asynchronous reset input that is falling-edge sensitive; while RESET is low all LDAC pulses are ignored, and activation loads the input and DAC registers with zero scale or midscale per the RSTSEL state."
},
{
"number": "15",
"name": "VREF",
"type": "power_in",
"description": "Reference voltage input/output; it is the reference output by default and becomes an external reference input when the internal reference is disabled."
},
{
"number": "16",
"name": "NIC",
"type": "unconnected",
"description": "No internal connection."
},
{
"number": "17",
"name": "VOUT3",
"type": "output",
"description": "Analog output voltage from DAC 3; the output amplifier has rail-to-rail operation."
},
{
"number": "18",
"name": "VOUT2",
"type": "output",
"description": "Analog output voltage from DAC 2; the output amplifier has rail-to-rail operation."
},
{
"number": "19",
"name": "VOUT1",
"type": "output",
"description": "Analog output voltage from DAC 1; the output amplifier has rail-to-rail operation."
},
{
"number": "20",
"name": "VOUT0",
"type": "output",
"description": "Analog output voltage from DAC 0; the output amplifier has rail-to-rail operation."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The LFCSP column of Table 9 lists the exposed pad as '0' rather than a numbered pin; it is reported ; GAIN and RSTSEL pins are marked N/A for the LFCSP package in Table 9, so they are not included. On L; VREF type is set to bidirectional because the datasheet describes it as either a reference output (d",
"exposed pad 21 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 9,
"cost_usd": 0.0524,
"at": "2026-10-30T18:23:20"
},
"datasheet": {
"url": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5672R_5676R.pdf",
"pages": 36,
"sha256": "82203c70f66724f4",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
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"refuses_to_fabricate": true
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