component
AD5663ARMZ
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD5663ARMZ
Analog Devices · Digital To Analog Converters (DACs) · MSOP-10
AD5663ARMZ from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTA | output | Analog output voltage from DAC A. Buffered rail-to-rail output; range 0 V to VDD (2.7 V to 5.5 V). |
| 2 | VOUTB | output | Analog output voltage from DAC B. Buffered rail-to-rail output; range 0 V to VDD. |
| 3 | GND | power_in | Ground reference point for all circuitry on the device. |
| 4 | LDAC | input | Active-low load DAC input. Pulsing this pin low updates any or all DAC registers if the input registers have new data, allowing simultaneous update of all DAC outputs. May be tied permanently low. Minimum pulse-width low tLDAC = 10 ns. |
| 5 | CLR | input | Asynchronous active-low clear input, falling-edge sensitive. When CLR is activated, zero scale is loaded to all input and DAC registers, forcing outputs to 0 V. While CLR is low, all LDAC pulses are ignored. |
| 6 | SYNC | input | Active-low frame synchronization / chip select for the SPI serial interface. When SYNC goes low, the SCLK and DIN buffers power up and the input shift register is enabled. Data is transferred on the 24 SCLK falling edges after the SYNC falling edge. |
| 7 | SCLK | input | Serial clock input. Data is clocked into the 24-bit input shift register on the falling edge of SCLK at rates up to 50 MHz. |
| 8 | DIN | input | Serial data input. 24-bit shift register clocked on the falling edge of SCLK; MSB first (DB23..DB0). |
| 9 | VDD | power_in | Power supply input, 2.7 V to 5.5 V. Decouple with a 10 uF capacitor in parallel with a 0.1 uF capacitor to GND. Typical IDD ~250 uA at 5 V, ~200 uA at 3 V. |
| 10 | VREF | input | External reference voltage input for both DACs. Range 0.75 V to VDD; typical reference input current 170 uA, input impedance ~26 kOhm. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
Ordering variants
Same part, different packaging or reel option.
AD5663ARMZAD5663ARMZ-REEL7AD5663ARMZBRMZAD5663ARMZBRMZ-REEL7AD5663ARMZ-1AD5663ARMZ-1REEL7AD5663ARMZBRMZ-1AD5663ARMZBRMZ-1REEL7AD5663ARMZACPZ-REEL7AD5663ARMZBCPZ-REEL7
CAD (KiCad official)
- Symbol:
AD5663ARMZ - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ad5663armz-etched.step/ad5663armz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5663armz.step/ad5663armz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
3d6924ca13680137, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).