# AD5660CRMZ-3

**Analog Devices** · Digital To Analog Converters (DACs) · MSOP-8

AD5660CRMZ-3 from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply input; these parts operate from 2.7 V to 5.5 V and VDD should be decoupled to GND. |
| 2 | VREFOUT | power_out | Reference voltage output carrying the internal reference, which is 1.25 V for the -1 parts and 2.5 V for the -2 and -3 parts. |
| 3 | VFB | input | Feedback connection for the output amplifier, which should be connected to VOUT for normal operation. |
| 4 | VOUT | output | Analog output voltage from the DAC, with rail-to-rail operation of the output amplifier. |
| 5 | SYNC | input | Active-low, level-triggered frame synchronization input that enables the input shift register; the DAC updates after the 24th falling SCLK edge for the AD5660 unless SYNC is taken high first, in which case the rising edge aborts the write. |
| 6 | SCLK | input | Serial clock input; data is clocked into the input shift register on the falling edge at rates up to 30 MHz. |
| 7 | DIN | input | Serial data input; the AD5660 uses a 24-bit shift register, clocked in on the falling edge of SCLK. |
| 8 | GND | power_in | Ground reference point for all circuitry on the part. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | ADC/DAC/Data Conversion |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resolution (AD5660) |  | 16 |  |  | Bits |  | 3 |
| Relative Accuracy (AD5660, grade C) |  | -16 |  | 16 | LSB |  | 3 |
| Differential Nonlinearity (AD5660, grade C) |  | -1 |  | 1 | LSB | Guaranteed monotonic by design | 3 |
| Zero-Code Error |  |  |  | 10 | mV |  | 3 |
| Offset Error |  | -10 |  | 10 | mV |  | 3 |
| Full-Scale Error |  | -1 |  | 1 | % FSR |  | 3 |
| Gain Error |  | -1.5 |  | 1.5 | % FSR |  | 3 |
| Output Voltage Range | VOUT | 0 |  |  | V | Printed maximum is VDD (not numeric) | 3 |
| Output Voltage Settling Time |  |  |  | 10 | µs | RL = 2 kΩ; 0 pF < CL < 200 pF | 3 |
| Reference Output Voltage |  | 2.495 |  | 2.505 | V | At ambient | 3 |
| Reference TC |  | -10 |  | 10 | ppm/°C |  | 3 |
| Input Current |  | -2 |  | 2 | µA | All digital inputs | 4 |
| VINL, Input Low Voltage | VINL |  |  | 0.8 | V | VDD = 5 V | 4 |
| VINH, Input High Voltage | VINH | 2 |  |  | V | VDD = 5 V | 4 |
| VDD, Supply Voltage (minimum) | VDD | 4.5 |  |  | V | All digital inputs at 0 V or VDD | 4 |
| VDD, Supply Voltage (maximum) | VDD |  |  | 5.5 | V | DAC active and excluding load current | 4 |
| IDD (Normal Mode) | IDD |  |  | 1 | mA | VDD = 4.5 V to 5.5 V, VIH = VDD and VIL = GND | 4 |
| IDD (All Power-Down Modes) | IDD |  |  | 1 | µA | VDD = 4.5 V to 5.5 V, VIH = VDD and VIL = GND | 4 |
| VDD to GND | VDD | -0.3 |  | 7 | V |  | 8 |
| VOUT to GND | VOUT | -0.3 |  |  | V | Maximum printed as VDD + 0.3 V | 8 |
| VFB to GND | VFB | -0.3 |  |  | V | Maximum printed as VDD + 0.3 V | 8 |
| VREFOUT to GND | VREFOUT | -0.3 |  |  | V | Maximum printed as VDD + 0.3 V | 8 |
| Digital Input Voltage to GND |  | -0.3 |  |  | V | Maximum printed as VDD + 0.3 V | 8 |
| Operating Temperature Range (Industrial) |  | -40 |  | 105 | °C | Industrial | 8 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 8 |
| Junction Temperature (TJ max) | TJ |  |  | 150 | °C |  | 8 |
| Reflow Soldering Peak Temperature |  |  |  | 240 | °C | SnPb | 8 |
| Reflow Soldering Peak Temperature |  |  |  | 260 | °C | Pb-Free | 8 |
| Thermal Impedance, junction-to-ambient | θJA |  | 141 |  | °C/W | MSOP package, 4-layer board | 8 |
| Thermal Impedance, junction-to-case | θJC |  | 44 |  | °C/W | MSOP package | 8 |
| SCLK cycle time | t1 | 33 |  |  | ns | VDD = 3.6 V to 5.5 V; SCLK cycle time | 7 |
| SCLK high time | t2 | 13 |  |  | ns | VDD = 3.6 V to 5.5 V; SCLK high time | 7 |
| SCLK low time | t3 | 13 |  |  | ns | VDD = 3.6 V to 5.5 V; SCLK low time | 7 |
| SYNC to SCLK falling edge setup time | t4 | 13 |  |  | ns | VDD = 3.6 V to 5.5 V; SYNC to SCLK falling edge setup time | 7 |
| Data setup time | t5 | 5 |  |  | ns | VDD = 3.6 V to 5.5 V; Data setup time | 7 |
| Data hold time | t6 | 4.5 |  |  | ns | VDD = 3.6 V to 5.5 V; Data hold time | 7 |
| SCLK falling edge to SYNC rising edge | t7 | 0 |  |  | ns | VDD = 3.6 V to 5.5 V; SCLK falling edge to SYNC rising edge | 7 |
| Minimum SYNC high time | t8 | 33 |  |  | ns | VDD = 3.6 V to 5.5 V; Minimum SYNC high time | 7 |
| SYNC rising edge to SCLK fall ignore | t9 | 13 |  |  | ns | VDD = 3.6 V to 5.5 V; SYNC rising edge to SCLK fall ignore | 7 |
| SCLK falling edge to SYNC fall ignore | t10 | 0 |  |  | ns | VDD = 3.6 V to 5.5 V; SCLK falling edge to SYNC fall ignore | 7 |
| Maximum SCLK frequency |  |  |  | 30 | MHz | VDD = 3.6 V to 5.5 V | 7 |

## CAD (KiCad official)

- Symbol: `AD5660CRMZ-3`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `ad5660crmz-3-etched.step` / `ad5660crmz-3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5660crmz-3.step` / `ad5660crmz-3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5620_5640_5660.pdf) (28 pp, sha256 `f2131f1417ffb106`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5660crmz-3-datasheet.pdf)