component
AD5644RBRMZ-3
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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"description": "Analog Devices Digital To Analog Converters (DACs), MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "AD5644RBRMZ-3",
"manufacturer": "Analog Devices",
"package": "MSOP-10",
"pin_count": 10,
"category": "ADC/DAC/Data Conversion",
"subcategory": "Digital To Analog Converters (DACs)",
"datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/AD5624R_5644R_5664R.pdf",
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"distributor_links": {
"lcsc": "C578246",
"digikey": "505-AD5644RBRMZ-3-ND",
"mouser": "584-AD5644RBRMZ-3"
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"pins": [
{
"number": "1",
"name": "VOUTA",
"type": "output",
"description": "Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation."
},
{
"number": "2",
"name": "VOUTB",
"type": "output",
"description": "Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "Ground Reference Point for all Circuitry on the Part."
},
{
"number": "4",
"name": "VOUTC",
"type": "output",
"description": "Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation."
},
{
"number": "5",
"name": "VOUTD",
"type": "output",
"description": "Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation."
},
{
"number": "6",
"name": "SYNC",
"type": "input",
"description": "Active Low Control Input that is the frame synchronization signal for the input data; data is transferred in on the falling edges of the next 24 clocks, and if SYNC is taken high before the 24th falling edge the write sequence is ignored."
},
{
"number": "7",
"name": "SCLK",
"type": "input",
"description": "Serial Clock Input; data is clocked into the input shift register on the falling edge of the serial clock, and data can be transferred at rates up to 50 MHz."
},
{
"number": "8",
"name": "DIN",
"type": "input",
"description": "Serial Data Input for a 24-bit shift register; data is clocked into the register on the falling edge of the serial clock input."
},
{
"number": "9",
"name": "VDD",
"type": "power_in",
"description": "Power Supply Input that can be operated from 2.7 V to 5.5 V and should be decoupled with a 10 μF capacitor in parallel with a 0.1 μF capacitor to GND."
},
{
"number": "10",
"name": "VREFIN/VREFOUT",
"type": "bidirectional",
"description": "Common pin for reference input and reference output; it is the reference output when the internal reference is used and the reference input when an external reference is used, defaulting to reference input."
}
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"at": "2026-10-28T16:10:52"
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"pages": 28,
"sha256": "a50d3043badbd5d0",
"source_tier": "mfr"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
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