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AD5641AKSZ-REEL7

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Analog Devices Digital To Analog Converters (DACs), SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentadc-dac-data conversionad5641aksz-reel7factory-2.0.0extractor-text

Verified AD5641AKSZ-REEL7

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier mfr, 6 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD5641AKSZ-REEL7 · SC-70-6 · 6 pins
  • ✓copper: 6 copper pads, none touching another net
  • ✓datasheet: all 6 pin names found in the 20-page datasheet
  • ✓distributor: lcsc C578245, digikey AD5641AKSZ-REEL7TR-ND, mouser 584-AD5641AKSZ-R7
  • ✓family: SOT-363_SC-70-6
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-61fiiwyc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 6 pins = 6 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 6 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad5641aksz-reel7.kicad_sym✓ ad5641aksz-reel7.kicad_mod✓ ad5641aksz-reel7.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 18h ago
viewers ad5641aksz-reel7: viewers · Ray 18h ago
ad5641aksz-reel7-etched.glb Publish 0.1.0 · Ray 18h ago
ad5641aksz-reel7-etched.step ad5641aksz-reel7: factory component page (tier=mfr) · Ray 18h ago
ad5641aksz-reel7-hero.glb ad5641aksz-reel7: hero GLB from the etched model (keeps the MPN mark) · Ray 18h ago
ad5641aksz-reel7-hero.overlay.json Publish 0.1.0 · Ray 18h ago
ad5641aksz-reel7.glb Publish 0.1.0 · Ray 18h ago
ad5641aksz-reel7.kicad_mod Publish 0.1.0 · Ray 18h ago
ad5641aksz-reel7.kicad_sym Publish 0.1.0 · Ray 18h ago
ad5641aksz-reel7.lbr Publish 0.1.0 · Ray 18h ago
ad5641aksz-reel7.step Publish 0.1.0 · Ray 18h ago
package.json Publish 0.1.0 · Ray 18h ago
page.json Set visibility: public · Ray 18h ago
README.md Publish 0.1.0 · Ray 18h ago
verification.json Verified: Published by the parts factory: tier mfr, 6 pins · Ray 17h ago

AD5641AKSZ-REEL7

Analog Devices · Digital To Analog Converters (DACs) · SC-70-6

AD5641AKSZ-REEL7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SYNC input Level-triggered active-low frame synchronization input; the DAC updates following the 16th clock cycle unless SYNC is taken high first, in which case the write is ignored.
2 SCLK input Serial clock input; data is clocked into the input shift register on the falling edge, at rates up to 30 MHz.
3 SDIN input Serial data input to a 16-bit shift register, clocked in on the falling edge of the serial clock.
4 VDD power_in Power supply input operating from 2.7 V to 5.5 V, which should be decoupled to GND.
5 GND power_in Ground reference point for all circuitry on the AD5641.
6 VOUT output Analog output voltage from the DAC, driven by an output amplifier with rail-to-rail operation.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SC-70-6
Category ADC/DAC/Data Conversion
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Relative Accuracy (INL) -16 16 LSB Linearity calculated using a reduced code range (Code 256 to Code 16,128) 3
Differential Nonlinearity -1 1 LSB Guaranteed monotonic by design 3
Zero-Code Error 0.5 10 mV All 0s loaded to DAC register 3
Offset Error -10 10 mV 3
Full-Scale Error -0.5 0.5 mV All 1s loaded to DAC register 3
Gain Error -0.037 0.037 % of FSR 3
Zero-Code Error Drift 5 µV/°C 3
Gain Temperature Coefficient 2 ppm of FSR/°C 3
Output Voltage Range VOUT 0 V Upper limit is VDD 3
Output Voltage Settling Time 6 10 µs Code ¼ scale to ¾ scale, to ±1 LSB 3
Slew Rate 0.5 V/µs 3
Capacitive Load Stability 470 pF RL = ∞ 3
Capacitive Load Stability 1000 pF RL = 2 kΩ 3
Output Noise Spectral Density 120 nV/√Hz DAC code = midscale, 1 kHz 3
Noise 2 µV DAC code = midscale, 0.1 Hz to 10 Hz bandwidth 3
Digital-to-Analog Glitch Impulse 5 nV-s 1 LSB change around major carry 3
Digital Feedthrough 0.2 nV-s 3
DC Output Impedance 0.5 Ω 3
Short-Circuit Current 15 mA VDD = 3 V/5 V 3
Input Current -2 2 µA Total current flowing into all pins 3
Input Low Voltage VINL 0.8 V VDD = 4.5 V to 5.5 V 3
Input Low Voltage VINL 0.6 V VDD = 2.7 V to 3.6 V 3
Input High Voltage VINH 1.8 V VDD = 4.5 V to 5.5 V 3
Input High Voltage VINH 1.4 V VDD = 2.7 V to 3.6 V 3
Pin Capacitance 3 pF 3
Supply Voltage VDD 2.7 5.5 V All digital inputs at 0 V or VDD 3
IDD (Normal Mode) IDD 75 100 µA VDD = 4.5 V to 5.5 V; DAC active and excluding load current; VIH = VDD and VIL = GND 3
IDD (Normal Mode) IDD 60 90 µA VDD = 2.7 V to 3.6 V; DAC active and excluding load current; VIH = VDD and VIL = GND 3
IDD (All Power-Down Modes) IDD 0.5 µA VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND 3
IDD (All Power-Down Modes) IDD 0.2 µA VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND 3
Power Efficiency IOUT/IDD 96 % ILOAD = 2 mA and VDD = ±5 V, full-scale loaded 3
SCLK cycle time t1 33 ns 4
SCLK high time t2 5 ns 4
SCLK low time t3 5 ns 4
SYNC to SCLK falling edge setup time t4 10 ns 4
Data setup time t5 5 ns 4
Data hold time t6 4.5 ns 4
SCLK falling edge to SYNC rising edge t7 0 ns 4
Minimum SYNC high time t8 20 ns 4
SYNC rising edge to next SCLK falling edge ignored t9 13 ns 4
Operating Temperature Range (Industrial) TA -40 125 °C 5
Storage Temperature Range -65 160 °C 5
Maximum Junction Temperature 150 °C 5
VDD to GND VDD -0.3 7 V 5
Reflow Soldering Peak Temperature 260 °C 5
ESD 2 kV 5
Thermal Impedance θJA (SC70) θJA 433.34 °C/W SC70 package 5
Thermal Impedance θJC (SC70) θJC 149.47 °C/W SC70 package 5

CAD (KiCad official)

  • Symbol: AD5641AKSZ-REEL7
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SC-70-6 (KiCad packages3D, STEP)
  • 3D model files: ad5641aksz-reel7-etched.step / ad5641aksz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5641aksz-reel7.step / ad5641aksz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 1fb231a400082c61, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF