AD5622BKSZ-2500RL7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	ADDR	input	Three-state address input that sets the two least significant bits (A1, A0) of the 7-bit I2C target address, per Table 7.
2	SCL	input	I2C serial clock line, used with SDA to clock data into or out of the 16-bit input register.
3	SDA	bidirectional	I2C serial data line, bidirectional and open-drain, pulled to the supply with an external pull-up resistor.
4	VDD	power_in	Power supply input operated from 2.7 V to 5.5 V and decoupled to GND.
5	GND	power_in	Ground reference point for all circuitry in the device.
6	VOUT	output	Analog output voltage from the DAC, driven by an output amplifier with rail-to-rail operation (0 V to VDD).

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SC-70-6
Category	ADC/DAC/Data Conversion
Pins	6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Relative Accuracy (INL)		-2		2	LSB	B, Y versions	3
Differential Nonlinearity		-1		1	LSB	Guaranteed monotonic by design	3
Zero Code Error			0.5	10	mV	All 0s loaded to DAC register	3
Offset Error		-10	0.063	10	mV		3
Full-Scale Error				0.5	mV	All 1s loaded to DAC register	3
Gain Error		-0.037	0.0004	0.037	% of FSR		3
Output Voltage Range	VOUT	0			V		3
Output Voltage Settling Time			6	10	µs	Code ¼ to ¾	3
Capacitive Load Stability (RL = ∞)	CL			470	pF	RL = ∞	3
Capacitive Load Stability (RL = 2 kΩ)	CL			1000	pF	RL = 2 kΩ	3
Input Current	IIN	-1		1	µA		3
VOL Output Low Voltage	VOL			0.4	V	ISINK = 3 mA	3
VOL Output Low Voltage	VOL			0.6	V	ISINK = 6 mA	3
Floating State Leakage Current		-1		1	µA		3
Supply Voltage	VDD	2.7		5.5	V		3
IDD Normal Mode	IDD		75	100	µA	VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND	3
IDD Normal Mode	IDD		60	90	µA	VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND	4
IDD All Power-Down Modes	IDD		0.3	1	µA	VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND	4
IDD All Power-Down Modes	IDD		0.15	1	µA	VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND	4
Power Efficiency IOUT/IDD	IOUT/IDD		96		%	ILOAD = 2 mA, VDD = 5 V	4
VDD to GND	VDD	-0.3		7	V		6
Operating Temperature Range	TA	-40		125	°C		6
Storage Temperature Range		-65		160	°C		6
Maximum Junction Temperature				150	°C		6
Lead Temperature, Soldering Vapor Phase				215	°C	60 sec	6
Lead Temperature, Soldering Infrared				220	°C	15 sec	6
Thermal Impedance Junction-to-Ambient (SC70)	θJA		332		°C/W	SC70 package	6
Thermal Impedance Junction-to-Case (SC70)	θJC		120		°C/W	SC70 package	6
Serial Clock Frequency	fSCL			100	KHz	Standard mode	4
Serial Clock Frequency	fSCL			400	KHz	Fast mode	4
tHIGH SCL High Time	t1	4			µs	Standard mode	4
tHIGH SCL High Time	t1	0.6			µs	Fast mode	4
tLOW SCL Low Time	t2	4.7			µs	Standard mode	4
tLOW SCL Low Time	t2	1.3			µs	Fast mode	4
tSU;DAT Data Setup Time	t3	250			ns	Standard mode	4
tSU;DAT Data Setup Time	t3	100			ns	Fast mode	4
tHD;DAT Data Hold Time	t4	0		3.45	µs	Standard mode	4
tHD;DAT Data Hold Time	t4	0		0.9	µs	Fast mode	4
tSU;STA Repeated Start Setup Time	t5	4.7			µs	Standard mode	4
tSU;STA Repeated Start Setup Time	t5	0.6			µs	Fast mode	4
tHD;STA Repeated Start Hold Time	t6	4			µs	Standard mode	4
tHD;STA Repeated Start Hold Time	t6	0.6			µs	Fast mode	4
tBUF Bus Free Time	t7	4.7			µs	Standard mode	4
tBUF Bus Free Time	t7	1.3			µs	Fast mode	4
tSU;STO Stop Condition Setup Time	t8	4			µs	Standard mode	4
tSU;STO Stop Condition Setup Time	t8	0.6			µs	Fast mode	5
Zero Code Error Drift			5		µV/°C		3
Gain Temperature Coefficient			2		ppm of FSR/°C		3
Slew Rate	SR		0.5		V/µs		3
Output Noise Spectral Density			120		nV/Hz	DAC code = midscale, 10 kHz	3
Digital-to-Analog Glitch Impulse			5		nV-sec	1 LSB change around major carry	3
Digital Feedthrough			0.2		nV-sec		3
DC Output Impedance			0.5		Ω		3
Short Circuit Current			15		mA	VDD = 3 V/5 V	3
Input Pin Capacitance	CIN		2		pF		3
Floating State Output Capacitance			2		pF		3

CAD (KiCad official)

Symbol: AD5622BKSZ-2500RL7
Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
3D model: SC-70-6 (KiCad packages3D, STEP)
3D model files: ad5622bksz-2500rl7-etched.step / ad5622bksz-2500rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5622bksz-2500rl7.step / ad5622bksz-2500rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (24 pp, sha256 82c5c0bb4dbbb956, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD5622BKSZ-2500RL7

Verified AD5622BKSZ-2500RL7

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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