component
AD5622AKSZ-2500RL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 3d ago |
| viewers | 3d ago |
| ad5622aksz-2500rl7-etched.glb | 3d ago |
| ad5622aksz-2500rl7-etched.step | 3d ago |
| ad5622aksz-2500rl7-hero.glb | 3d ago |
| ad5622aksz-2500rl7-hero.overlay.json | 3d ago |
| ad5622aksz-2500rl7.glb | 3d ago |
| ad5622aksz-2500rl7.kicad_mod | 3d ago |
| ad5622aksz-2500rl7.kicad_sym | 3d ago |
| ad5622aksz-2500rl7.lbr | 3d ago |
| ad5622aksz-2500rl7.step | 3d ago |
| package.json | 3d ago |
| page.json | 3d ago |
| README.md | 3d ago |
| verification.json | 3d ago |
AD5622AKSZ-2500RL7
Analog Devices · Digital To Analog Converters (DACs) · SC-70-6
AD5622AKSZ-2500RL7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADDR | input | Three-state address input that sets the two least significant bits (A1, A0) of the 7-bit target address per Table 7. |
| 2 | SCL | input | Serial clock line used with SDA to clock data into or out of the 16-bit input register; this part (AD5622AKSZ-2500RL7) supports standard (100 kHz) and fast (400 kHz) modes per Table 11. |
| 3 | SDA | bidirectional | Bidirectional open-drain serial data line that is pulled to the supply with an external pull-up resistor and is used with SCL to clock data into or out of the 16-bit input register. |
| 4 | VDD | power_in | Power supply input that can be operated from 2.7 V to 5.5 V and is decoupled to GND. |
| 5 | GND | power_in | Ground reference point for all circuitry on the device. |
| 6 | VOUT | output | Analog output voltage from the DAC, driven by a rail-to-rail output amplifier that gives an output range of 0 V to VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SC-70-6 |
| Category | ADC/DAC/Data Conversion |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative accuracy (INL), A version | -6 | 6 | LSB | A, W versions; linearity calculated over code range 64 to 4032 | 3 | ||
| Differential nonlinearity | -1 | 1 | LSB | Guaranteed monotonic by design; linearity calculated over code range 64 to 4032 | 3 | ||
| Zero code error | 0.5 | 10 | mV | All 0s loaded to DAC register | 3 | ||
| Offset error | -10 | 10 | mV | 3 | |||
| Gain error | -0.037 | 0.037 | % of FSR | 3 | |||
| Output voltage range | VOUT | 0 | V | 3 | |||
| Output voltage settling time | 6 | 10 | µs | Code ¼ to ¾ | 3 | ||
| Input current (SDA, SCL) | IIN | -1 | 1 | µA | 3 | ||
| Floating state leakage current | -1 | 1 | µA | 3 | |||
| Supply voltage | VDD | 2.7 | 5.5 | V | 3 | ||
| IDD normal mode | IDD | 75 | 100 | µA | DAC active and excluding load current; VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND | 3 | |
| IDD normal mode | IDD | 60 | 90 | µA | DAC active and excluding load current; VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND | 4 | |
| IDD all power-down modes | IDD | 0.3 | 1 | µA | VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND | 4 | |
| IDD all power-down modes | IDD | 0.15 | 1 | µA | VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND | 4 | |
| tHD;DAT data hold time | t4 | 0 | 3.45 | µs | Standard mode | 4 | |
| tHD;DAT data hold time | t4 | 0 | 0.9 | µs | Fast mode | 4 | |
| Pulse width of spike suppressed | tSP | 0 | 50 | ns | Fast mode | 5 | |
| VDD to GND | -0.3 | 7 | V | 6 | |||
| Digital input voltage to GND | -0.3 | V | 6 | ||||
| VOUT to GND | -0.3 | V | 6 | ||||
| Operating temperature range | -40 | 125 | °C | 6 | |||
| Storage temperature range | -65 | 160 | °C | 6 | |||
| Maximum junction temperature | 150 | °C | 6 | ||||
| Thermal impedance, junction to ambient (θJA) | θJA | 332 | °C/W | SC70 package | 6 | ||
| Thermal impedance, junction to case (θJC) | θJC | 120 | °C/W | SC70 package | 6 | ||
| Lead temperature, vapor phase soldering | 215 | °C | Vapor phase (60 sec) | 6 | |||
| Lead temperature, infrared soldering | 220 | °C | Infrared (15 sec) | 6 |
CAD (KiCad official)
- Symbol:
AD5622AKSZ-2500RL7 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
ad5622aksz-2500rl7-etched.step/ad5622aksz-2500rl7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5622aksz-2500rl7.step/ad5622aksz-2500rl7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (24 pp, sha256
82c5c0bb4dbbb956, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).