component
AD5621BKSZ-REEL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), SOT-363-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
Ray
ad5621bksz-reel7: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
91f3b74
1mo ago
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{
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"slug": "ad5621bksz-reel7",
"title": "AD5621BKSZ-REEL7",
"brief": "Analog Devices Digital To Analog Converters (DAC), SOT-363-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
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"manufacturer": "Analog Devices",
"package": "SOT-363-6",
"pin_count": 6,
"category": "Data Acquisition",
"subcategory": "Digital To Analog Converters (DAC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586202847440474112",
"parts": {
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"footprint": "ad5621bksz-reel7.kicad_mod",
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"lbr": "ad5621bksz-reel7.lbr"
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"distributor_links": {
"lcsc": "C73472"
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"pins": [
{
"number": "1",
"name": "SYNC",
"type": "input",
"description": "Level-triggered control input (active low) for frame synchronization signal; enables input shift register when taken low, and DAC updates following 16th clock cycle unless SYNC rises before this edge to interrupt the write sequence."
},
{
"number": "2",
"name": "SCLK",
"type": "input",
"description": "Serial clock input for clocking data into the 16-bit input shift register on falling edge; maximum data transfer rate up to 30 MHz."
},
{
"number": "3",
"name": "SDIN",
"type": "input",
"description": "Serial data input to 16-bit shift register; data clocked into the register on the falling edge of SCLK."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "Power supply input operating from 2.7 V to 5.5 V; should be decoupled to GND with 10 μF and 0.1 μF capacitors."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference point for all circuitry on the AD5601/AD5611/AD5621."
},
{
"number": "6",
"name": "VOUT",
"type": "output",
"description": "Analog output voltage from the DAC with rail-to-rail operation providing output range from 0 V to VDD."
}
],
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"extractor": "extract_pins 0.2",
"primary_model": "claude-haiku-4-5-20251001",
"primary_mode": "text",
"consensus_model": "claude-sonnet-4-6",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [],
"pages_sent": 21,
"cost_usd": 0.1939,
"at": "2026-09-22T09:10:19"
},
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"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586202847440474112",
"pages": 21,
"sha256": "1f8185bd626f1e11",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"total": 6,
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"models_3d": [
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"file": "ad5621bksz-reel7.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
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],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "045cc95e18ee7a13d1623c3ce6604fc833049bdb4f952f68c26e3c5767d122e4",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ad5621bksz-reel7-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
2.1,
2.0,
1.1
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"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "2756d7e13f56f208178b7caa57bf5ad3b4432b2be6ee064ffb197d3ed1408430",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Analog Devices",
"Package": "SOT-363-6",
"Category": "Data Acquisition",
"Pins": "6"
}
},
"variants": [],
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"discovery_pitch": "AD5621BKSZ-REEL7 (Analog Devices) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
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"files": [
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"ad5621bksz-reel7.lbr",
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"docs/ad5621bksz-reel7-datasheet.pdf",
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"visibility": {
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},
"updated_at": "2026-09-24T15:35:07.215Z"
}