component
AD5612AKSZ-2500RL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD5612AKSZ-2500RL7
Analog Devices · Digital To Analog Converters (DAC) · SC-70-6
AD5612AKSZ-2500RL7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADDR | input | Three-state address input that sets the two least significant bits (A1, A0) of the 7-bit slave address. |
| 2 | SCL | input | Serial clock line, used with SDA to clock data into or out of the 16-bit input register. |
| 3 | SDA | bidirectional | Bidirectional open-drain serial data line, used with SCL to clock data into or out of the 16-bit input register, and pulled to the supply with an external pull-up resistor. |
| 4 | VDD | power_in | Power supply input that can be operated from 2.7 V to 5.5 V and is decoupled to GND. |
| 5 | GND | power_in | Ground reference point for all circuitry on the device. |
| 6 | VOUT | output | Analog output voltage from the DAC, with an output amplifier that has rail-to-rail operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SC-70-6 |
| Category | Data Acquisition |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy (A version) | -4 | 4 | LSB | A version | 3 | ||
| Differential Nonlinearity | -1 | 1 | LSB | Guaranteed monotonic by design | 3 | ||
| Zero Code Error | 0.5 | 10 | mV | All 0s loaded to DAC register | 3 | ||
| Offset Error | -10 | 0.063 | 10 | mV | 3 | ||
| Gain Error | -0.037 | 0.0004 | 0.037 | % of FSR | 3 | ||
| Output Voltage Range | VOUT | 0 | V | 3 | |||
| Output Voltage Settling Time | 6 | 10 | µs | Code ¼ to ¾ | 3 | ||
| Input Current | IIN | -1 | 1 | µA | 3 | ||
| Output Low Voltage | VOL | 0.4 | V | ISINK = 3 mA | 3 | ||
| Output Low Voltage | VOL | 0.6 | V | ISINK = 6 mA | 3 | ||
| Floating State Leakage Current | -1 | 1 | µA | 3 | |||
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| IDD (Normal Mode) | IDD | 75 | 100 | µA | VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND; DAC active and excluding load current | 4 | |
| IDD (Normal Mode) | IDD | 60 | 90 | µA | VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND; DAC active and excluding load current | 4 | |
| IDD (All Power-Down Modes) | IDD | 0.3 | 1 | µA | VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND | 4 | |
| IDD (All Power-Down Modes) | IDD | 0.15 | 1 | µA | VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND | 4 | |
| VDD to GND | VDD | -0.3 | 7 | V | 6 | ||
| Digital Input Voltage to GND | -0.3 | V | Upper limit printed as VDD + 0.3 V | 6 | |||
| VOUT to GND | VOUT | -0.3 | V | Upper limit printed as VDD + 0.3 V | 6 | ||
| Operating Temperature Range | -40 | 125 | °C | A, B versions | 6 | ||
| Storage Temperature Range | -65 | 160 | °C | 6 | |||
| Maximum Junction Temperature | TJ | 150 | °C | 6 | |||
| Lead Temperature, Soldering (Vapor Phase) | 215 | °C | 60 sec | 6 | |||
| Lead Temperature, Soldering (Infrared) | 220 | °C | 15 sec | 6 | |||
| Thermal Impedance, junction to ambient (SC70) | θJA | 332 | °C/W | SC70 package | 6 | ||
| Thermal Impedance, junction to case (SC70) | θJC | 120 | °C/W | SC70 package | 6 |
CAD (KiCad official)
- Symbol:
AD5612AKSZ-2500RL7 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
ad5612aksz-2500rl7-etched.step/ad5612aksz-2500rl7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5612aksz-2500rl7.step/ad5612aksz-2500rl7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (23 pp, sha256
529cf77d29a6534f, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD5612AKSZ-2500RL7
**Analog Devices** · Digital To Analog Converters (DAC) · SC-70-6
AD5612AKSZ-2500RL7 from Analog Devices, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADDR | input | Three-state address input that sets the two least significant bits (A1, A0) of the 7-bit slave address. |
| 2 | SCL | input | Serial clock line, used with SDA to clock data into or out of the 16-bit input register. |
| 3 | SDA | bidirectional | Bidirectional open-drain serial data line, used with SCL to clock data into or out of the 16-bit input register, and pulled to the supply with an external pull-up resistor. |
| 4 | VDD | power_in | Power supply input that can be operated from 2.7 V to 5.5 V and is decoupled to GND. |
| 5 | GND | power_in | Ground reference point for all circuitry on the device. |
| 6 | VOUT | output | Analog output voltage from the DAC, with an output amplifier that has rail-to-rail operation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SC-70-6 |
| Category | Data Acquisition |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy (A version) | | -4 | | 4 | LSB | A version | 3 |
| Differential Nonlinearity | | -1 | | 1 | LSB | Guaranteed monotonic by design | 3 |
| Zero Code Error | | | 0.5 | 10 | mV | All 0s loaded to DAC register | 3 |
| Offset Error | | -10 | 0.063 | 10 | mV | | 3 |
| Gain Error | | -0.037 | 0.0004 | 0.037 | % of FSR | | 3 |
| Output Voltage Range | VOUT | 0 | | | V | | 3 |
| Output Voltage Settling Time | | | 6 | 10 | µs | Code ¼ to ¾ | 3 |
| Input Current | IIN | -1 | | 1 | µA | | 3 |
| Output Low Voltage | VOL | | | 0.4 | V | ISINK = 3 mA | 3 |
| Output Low Voltage | VOL | | | 0.6 | V | ISINK = 6 mA | 3 |
| Floating State Leakage Current | | -1 | | 1 | µA | | 3 |
| Supply Voltage | VDD | 2.7 | | 5.5 | V | | 4 |
| IDD (Normal Mode) | IDD | | 75 | 100 | µA | VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND; DAC active and excluding load current | 4 |
| IDD (Normal Mode) | IDD | | 60 | 90 | µA | VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND; DAC active and excluding load current | 4 |
| IDD (All Power-Down Modes) | IDD | | 0.3 | 1 | µA | VDD = 4.5 V to 5.5 V; VIH = VDD and VIL = GND | 4 |
| IDD (All Power-Down Modes) | IDD | | 0.15 | 1 | µA | VDD = 2.7 V to 3.6 V; VIH = VDD and VIL = GND | 4 |
| VDD to GND | VDD | -0.3 | | 7 | V | | 6 |
| Digital Input Voltage to GND | | -0.3 | | | V | Upper limit printed as VDD + 0.3 V | 6 |
| VOUT to GND | VOUT | -0.3 | | | V | Upper limit printed as VDD + 0.3 V | 6 |
| Operating Temperature Range | | -40 | | 125 | °C | A, B versions | 6 |
| Storage Temperature Range | | -65 | | 160 | °C | | 6 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 6 |
| Lead Temperature, Soldering (Vapor Phase) | | | | 215 | °C | 60 sec | 6 |
| Lead Temperature, Soldering (Infrared) | | | | 220 | °C | 15 sec | 6 |
| Thermal Impedance, junction to ambient (SC70) | θJA | | 332 | | °C/W | SC70 package | 6 |
| Thermal Impedance, junction to case (SC70) | θJC | | 120 | | °C/W | SC70 package | 6 |
## CAD (KiCad official)
- Symbol: `AD5612AKSZ-2500RL7`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files: `ad5612aksz-2500rl7-etched.step` / `ad5612aksz-2500rl7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5612aksz-2500rl7.step` / `ad5612aksz-2500rl7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589805128968024064) (23 pp, sha256 `529cf77d29a6534f`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad5612aksz-2500rl7-datasheet.pdf)