# AD5551BRZ-REEL7

**Analog Devices** · Pre-ordered Chips · SOIC-8

AD5551BRZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Analog output voltage from the DAC, which swings from 0 V to VREF − 1 LSB in unipolar operation and is unbuffered, so it is rated to drive loads of 60 kΩ directly. |
| 2 | AGND | power_in | Ground reference point for the analog circuitry, which must stay within −0.3 V to +0.3 V of DGND per the absolute maximum ratings. |
| 3 | VREF | power_in | Voltage reference input for the DAC, which should be driven from 2 V to VDD (reference input range 2.0 V to VDD) from a low-impedance source. |
| 4 | CS | input | Active-low chip select that frames the serial data input, so data can only be loaded while CS is low and the DAC updates on its rising edge. |
| 5 | SCLK | input | Serial clock input whose data is latched on the rising edge, with a duty cycle between 40% and 60% and a maximum SCLK frequency of 25 MHz. |
| 6 | DIN | input | Serial data input that accepts 14-bit words clocked in MSB first on the rising edge of SCLK, with digital input voltage limited to DGND −0.3 V to VDD + 0.3 V. |
| 7 | DGND | power_in | Digital ground reference for the digital circuitry. |
| 8 | VDD | power_in | Analog supply voltage of 2.7 V to 5.5 V ± 10%, with VDD to AGND rated −0.3 V to +6 V absolute maximum. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy, INL | INL | -1 | 0.15 | 1 | LSB | B grade | 3 |
| Differential Nonlinearity | DNL | -0.8 | 0.15 | 0.8 | LSB | Guaranteed monotonic | 3 |
| Gain Error |  | -1.5 | -0.3 | 0.5 | LSB |  | 3 |
| Gain Error Temperature Coefficient |  | -0.1 | 0.1 | 0.1 | ppm/°C |  | 3 |
| Zero-Code Error |  | -1 | 0.1 | 1 | LSB |  | 3 |
| Zero-Code Temperature Coefficient |  | -0.05 | 0.05 | 0.05 | ppm/°C |  | 3 |
| Output Voltage Range (unipolar) | VOUT | 0 |  |  | V | Unipolar operation; max printed as VREF − 1 LSB | 3 |
| Power Supply Rejection Ratio |  | -1 |  | 1 | LSB | ΔVDD ± 10% | 3 |
| Reference Input Range | VREF | 2 |  |  | V |  | 3 |
| Input Current | IIN | -1 |  | 1 | μA |  | 3 |
| VINL, Input Low Voltage | VINL |  |  | 0.8 | V |  | 3 |
| VINH, Input High Voltage | VINH | 2.4 |  |  | V |  | 3 |
| Supply Voltage | VDD | 2.7 |  | 5.5 | V |  | 3 |
| Supply Current (IDD) | IDD |  | 125 | 150 | μA |  | 3 |
| Power Dissipation |  |  | 0.625 | 0.825 | mW |  | 3 |
| SCLK cycle frequency | fSCLK |  |  | 25 | MHz |  | 4 |
| SCLK cycle time | t1 | 40 |  |  | ns |  | 4 |
| SCLK high time | t2 | 20 |  |  | ns |  | 4 |
| SCLK low time | t3 | 20 |  |  | ns |  | 4 |
| CS low to SCLK high setup | t4 | 15 |  |  | ns |  | 4 |
| CS high to SCLK high setup | t5 | 15 |  |  | ns |  | 4 |
| SCLK high to CS low hold time | t6 | 35 |  |  | ns |  | 4 |
| SCLK high to CS high hold time | t7 | 20 |  |  | ns |  | 4 |
| Data setup time | t8 | 15 |  |  | ns |  | 4 |
| Data hold time | t9 | 0 |  |  | ns |  | 4 |
| CS high time between active periods | t12 | 30 |  |  | ns |  | 4 |
| VDD to AGND | VDD | -0.3 |  | 6 | V |  | 5 |
| Digital Input Voltage to DGND |  | -0.3 |  |  | V | Upper limit printed as VDD + 0.3 V | 5 |
| VOUT to AGND | VOUT | -0.3 |  |  | V | Upper limit printed as VDD + 0.3 V | 5 |
| AGND, AGNDF, AGNDS to DGND |  | -0.3 |  | 0.3 | V |  | 5 |
| Input Current to Any Pin Except Supplies |  | -10 |  | 10 | mA |  | 5 |
| Operating Temperature Range (Industrial, B Version) | TA | -40 |  | 85 | °C | B version | 5 |
| Storage Temperature Range | TSTG | -65 |  | 150 | °C |  | 5 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 5 |
| Lead Temperature, Soldering Peak Temperature |  |  |  | 260 | °C | As per JEDEC Standard 20 | 5 |
| ESD (HBM classification) |  |  |  | 5 | kV | HBM classification | 5 |
| Operating Temperature (recommended, TMIN to TMAX) | TA | -40 |  | 85 | °C |  | 3 |
| Reference Voltage (recommended) | VREF | 2.5 |  |  | V | Upper limit printed as VDD | 3 |
| Thermal Impedance, junction to ambient | θJA |  | 149.5 |  | °C/W | SOIC (R-8) | 5 |

## CAD (KiCad official)

- Symbol: `AD5551BRZ-REEL7`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ad5551brz-reel7-etched.step` / `ad5551brz-reel7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5551brz-reel7.step` / `ad5551brz-reel7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5551_5552.pdf) (16 pp, sha256 `0381a591725044ad`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5551brz-reel7-datasheet.pdf)