AD5452YUJZ-REEL7

{
  "slug": "ad5452yujz-reel7",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Digital To Analog Converters (DACs), TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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  "component": {
    "mpn": "AD5452YUJZ-REEL7",
    "manufacturer": "Analog Devices",
    "package": "TSOT-23-8",
    "pin_count": 8,
    "category": "Data Converters",
    "subcategory": "Digital To Analog Converters (DACs)",
    "datasheet": "https://www.analog.com/media/en/technical-documentation/data-sheets/ad5450_5451_5452_5453.pdf",
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    "distributor_links": {
      "lcsc": "C209454",
      "digikey": "505-AD5452YUJZ-REEL7TR-ND",
      "mouser": "584-AD5452YUJZ-R7"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T17:51:02Z",
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        "pn": "505-AD5452YUJZ-REEL7TR-ND",
        "status": "found"
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    "pins": [
      {
        "number": "1",
        "name": "RFB",
        "type": "passive",
        "description": "DAC feedback resistor that establishes the DAC voltage output when connected to the external amplifier output."
      },
      {
        "number": "2",
        "name": "VREF",
        "type": "power_in",
        "description": "DAC reference voltage input, where the applied VREF sets the full-scale output current and the device can handle ±10 V reference inputs."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive power supply input, which can operate from a supply of 2.5 V to 5.5 V."
      },
      {
        "number": "4",
        "name": "SYNC",
        "type": "input",
        "description": "Active low control input that is the frame synchronization signal for the input data, with data loaded to the shift register upon the active edge of the following clocks."
      },
      {
        "number": "5",
        "name": "SDIN",
        "type": "input",
        "description": "Serial data input clocked into the 16-bit input register on the active edge of the serial clock, defaulting to the falling edge of SCLK at power-up."
      },
      {
        "number": "6",
        "name": "SCLK",
        "type": "input",
        "description": "Serial clock input, by default clocking data into the input shift register on the falling edge of the serial clock."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "8",
        "name": "IOUT1",
        "type": "output",
        "description": "DAC current output."
      }
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        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
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        "cost_usd": 0.0138,
        "at": "2026-11-02T17:50:55"
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        "pages": 28,
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        "source_tier": "mfr"
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      "cad": "KiCad official (CC-BY-SA 4.0)",
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        "total": 8,
        "described": 8,
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        "refuses_to_fabricate": true
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}