# AD5452YUJZ-REEL7

**Analog Devices** · Digital To Analog Converters (DACs) · TSOT-23-8

AD5452YUJZ-REEL7 from Analog Devices, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RFB | passive | DAC feedback resistor that establishes the DAC voltage output when connected to the external amplifier output. |
| 2 | VREF | power_in | DAC reference voltage input, where the applied VREF sets the full-scale output current and the device can handle ±10 V reference inputs. |
| 3 | VDD | power_in | Positive power supply input, which can operate from a supply of 2.5 V to 5.5 V. |
| 4 | SYNC | input | Active low control input that is the frame synchronization signal for the input data, with data loaded to the shift register upon the active edge of the following clocks. |
| 5 | SDIN | input | Serial data input clocked into the 16-bit input register on the active edge of the serial clock, defaulting to the falling edge of SCLK at power-up. |
| 6 | SCLK | input | Serial clock input, by default clocking data into the input shift register on the falling edge of the serial clock. |
| 7 | GND | power_in | Ground pin. |
| 8 | IOUT1 | output | DAC current output. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-8 |
| Category | Data Converters |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy |  | -0.5 |  | 0.5 | LSB |  | 3 |
| Differential Nonlinearity |  | -1 |  | 1 | LSB | Guaranteed monotonic | 3 |
| Total Unadjusted Error |  | -1 |  | 1 | LSB |  | 3 |
| Gain Error |  | -0.5 |  | 0.5 | LSB |  | 3 |
| Gain Error Temperature Coefficient |  | -2 |  | 2 | ppm FSR/°C |  | 3 |
| Output Leakage Current |  | -1 |  | 1 | nA | Data = 0x0000, TA = 25°C, IOUT1 | 3 |
| Output Leakage Current |  | -10 |  | 10 | nA | Data = 0x0000, TA = −40°C to +125°C, IOUT1 | 3 |
| VREF Input Resistance |  | 7 | 9 | 11 | kΩ | Input resistance, TC = −50 ppm/°C | 3 |
| RFB Feedback Resistance | RFB | 7 | 9 | 11 | kΩ | Input resistance, TC = −50 ppm/°C | 3 |
| Input High Voltage | VIH | 2 |  |  | V | VDD = 3.6 V to 5 V | 3 |
| Input High Voltage | VIH | 1.7 |  |  | V | VDD = 2.5 V to 3.6 V | 3 |
| Input Low Voltage | VIL |  |  | 0.8 | V | VDD = 2.7 V to 5.5 V | 3 |
| Input Low Voltage | VIL |  |  | 0.7 | V | VDD = 2.5 V to 2.7 V | 3 |
| Output Low Voltage | VOL |  |  | 0.4 | V | VDD = 4.5 V to 5 V, ISINK = 200 μA | 3 |
| Input Leakage Current | IIL | -1 |  | 1 | μA | TA = 25°C | 3 |
| Input Leakage Current | IIL | -10 |  | 10 | μA | TA = −40°C to +125°C | 3 |
| Power Supply Range | VDD | 2.5 |  | 5.5 | V |  | 3 |
| Supply Current | IDD |  | 0.4 | 10 | μA | TA = −40°C to +125°C, logic inputs = 0 V or VDD | 3 |
| Supply Current | IDD |  | 0.6 |  | μA | TA = 25°C, logic inputs = 0 V or VDD | 3 |
| Maximum Clock Frequency | fSCLK |  |  | 50 | MHz | VDD = 2.5 V to 5.5 V | 5 |
| SCLK Cycle Time | t1 | 20 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| SCLK High Time | t2 | 8 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| SCLK Low Time | t3 | 8 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| SYNC Falling Edge to SCLK Active Edge Setup Time | t4 | 8 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| Data Setup Time | t5 | 5 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| Data Hold Time | t6 | 4.5 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| SYNC Rising Edge to SCLK Active Edge | t7 | 5 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| Minimum SYNC High Time | t8 | 30 |  |  | ns | VDD = 2.5 V to 5.5 V | 5 |
| VDD to GND | VDD | -0.3 |  | 7 | V |  | 6 |
| VREF, RFB to GND | VREF, RFB | -12 |  | 12 | V |  | 6 |
| IOUT1 to GND | IOUT1 | -0.3 |  | 7 | V |  | 6 |
| Input Current to Any Pin Except Supplies |  | -10 |  | 10 | mA |  | 6 |
| Logic Inputs and Output |  | -0.3 |  |  | V | Maximum is VDD + 0.3 V | 6 |
| Operating Temperature Range, Extended (Y Version) |  | -40 |  | 125 | °C |  | 6 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 6 |
| Junction Temperature |  |  |  | 150 | °C |  | 6 |
| θJA Thermal Impedance, 8-Lead TSOT | θJA |  | 211 |  | °C/W | 8-Lead TSOT | 6 |
| Reference Multiplying Bandwidth |  |  | 12 |  | MHz | VREF = ±3.5 V, DAC loaded with all 1s | 4 |
| Input Capacitance, Digital Inputs |  |  | 10 |  | pF |  | 3 |

## CAD (KiCad official)

- Symbol: `AD5452YUJZ-REEL7`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-8`
- 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files: `ad5452yujz-reel7-etched.step` / `ad5452yujz-reel7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5452yujz-reel7.step` / `ad5452yujz-reel7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ad5450_5451_5452_5453.pdf) (28 pp, sha256 `6be2f2663e55e3c1`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5452yujz-reel7-datasheet.pdf)