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AD5452YRMZ

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Analog Devices Digital To Analog Converters (DACs), MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentdata convertersad5452yrmzfactory-2.0.0extractor-text

Verified AD5452YRMZ

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AD5452YRMZ · MSOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 28-page datasheet
  • ✓distributor: lcsc C208119, digikey 505-AD5452YRMZ-ND, mouser 584-AD5452YRMZ
  • ✓family: MSOP-8_3x3mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1vuyc9xy/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.26)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ad5452yrmz.kicad_sym✓ ad5452yrmz.kicad_mod✓ ad5452yrmz.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers ad5452yrmz: viewers · Ray 4d ago
ad5452yrmz-etched.glb Publish 0.1.0 · Ray 4d ago
ad5452yrmz-etched.step ad5452yrmz: factory component page (tier=mfr) · Ray 4d ago
ad5452yrmz-hero.glb ad5452yrmz: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
ad5452yrmz-hero.overlay.json Publish 0.1.0 · Ray 4d ago
ad5452yrmz.glb Publish 0.1.0 · Ray 4d ago
ad5452yrmz.kicad_mod Publish 0.1.0 · Ray 4d ago
ad5452yrmz.kicad_sym Publish 0.1.0 · Ray 4d ago
ad5452yrmz.lbr Publish 0.1.0 · Ray 4d ago
ad5452yrmz.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 4d ago

AD5452YRMZ

Analog Devices · Digital To Analog Converters (DACs) · MSOP-8

AD5452YRMZ from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IOUT1 output DAC current output; absolute maximum rating for IOUT1 to GND is −0.3 V to +7 V.
2 GND power_in Ground pin.
3 SCLK input Serial clock input; data is clocked into the input shift register on the falling edge by default, or on the rising edge if set by the serial control bits.
4 SDIN input Serial data input, clocked into the 16-bit input register on the active clock edge (falling edge by default, changeable to rising edge by the control bits); logic overvoltages are clamped by internal diodes.
5 SYNC input Active-low control input that is the frame synchronization signal for input data, with data loaded to the shift register upon the active edge of the following clocks.
6 VDD power_in Positive power supply input that operates from 2.5 V to 5.5 V; VDD to GND absolute maximum is −0.3 V to +7 V.
7 VREF power_in DAC reference voltage input, rated for a reference input range of ±10 V; VREF to GND absolute maximum is −12 V to +12 V.
8 RFB passive DAC feedback resistor that establishes the DAC voltage output when connected to the external amplifier output; RFB to GND absolute maximum is −12 V to +12 V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-8
Category Data Converters
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Relative Accuracy -0.5 0.5 LSB 3
Differential Nonlinearity -1 1 LSB Guaranteed monotonic 3
Total Unadjusted Error -1 1 LSB 3
Gain Error -0.5 0.5 LSB 3
Gain Error Temperature Coefficient -2 2 ppm FSR/°C 3
Output Leakage Current -1 1 nA Data = 0x0000, TA = 25°C, IOUT1 3
Output Leakage Current -10 10 nA Data = 0x0000, TA = −40°C to +125°C, IOUT1 3
Reference Input Range -10 10 V 3
VREF Input Resistance 7 9 11 kΩ Input resistance, TC = −50 ppm/°C 3
RFB Feedback Resistance 7 9 11 kΩ Input resistance, TC = −50 ppm/°C 3
Input Capacitance, Zero-Scale Code 18 22 pF 3
Input Capacitance, Full-Scale Code 18 22 pF 3
Input High Voltage VIH 2 V VDD = 3.6 V to 5 V 3
Input High Voltage VIH 1.7 V VDD = 2.5 V to 3.6 V 3
Input Low Voltage VIL 0.8 V VDD = 2.7 V to 5.5 V 3
Input Low Voltage VIL 0.7 V VDD = 2.5 V to 2.7 V 3
Output Low Voltage VOL 0.4 V VDD = 4.5 V to 5 V, ISINK = 200 μA 3
Input Leakage Current IIL -1 1 μA TA = 25°C 3
Input Leakage Current IIL -10 10 μA TA = −40°C to +125°C 4
Output Voltage Settling Time, measured to ±1 mV of FS 100 110 ns VREF = 10 V, RLOAD = 100 Ω; DAC latch alternately loaded with 0s and 1s 4
Output Voltage Settling Time, measured to ±4 mV of FS 24 40 ns VREF = 10 V, RLOAD = 100 Ω; DAC latch alternately loaded with 0s and 1s 4
Output Voltage Settling Time, measured to ±16 mV of FS 16 33 ns VREF = 10 V, RLOAD = 100 Ω; DAC latch alternately loaded with 0s and 1s 4
Digital Delay 20 40 ns Interface delay time 4
10% to 90% Settling Time 10 30 ns Rise and fall times, VREF = 10 V, RLOAD = 100 Ω 4
Power Supply Range VDD 2.5 5.5 V 4
Supply Current, IDD IDD 0.4 10 μA TA = −40°C to +125°C, logic inputs = 0 V or VDD 4
Maximum Clock Frequency fSCLK 50 MHz VDD = 2.5 V to 5.5 V 5
SCLK Cycle Time t1 20 ns VDD = 2.5 V to 5.5 V 5
SCLK High Time t2 8 ns VDD = 2.5 V to 5.5 V 5
SCLK Low Time t3 8 ns VDD = 2.5 V to 5.5 V 5
SYNC Falling Edge to SCLK Active Edge Setup Time t4 8 ns VDD = 2.5 V to 5.5 V 5
Data Setup Time t5 5 ns VDD = 2.5 V to 5.5 V 5
Data Hold Time t6 4.5 ns VDD = 2.5 V to 5.5 V 5
SYNC Rising Edge to SCLK Active Edge t7 5 ns VDD = 2.5 V to 5.5 V 5
Minimum SYNC High Time t8 30 ns VDD = 2.5 V to 5.5 V 5
VDD to GND -0.3 7 V 6
VREF, RFB to GND -12 12 V 6
IOUT1 to GND -0.3 7 V 6
Input Current to Any Pin Except Supplies -10 10 mA 6
Logic Inputs and Output -0.3 V Upper limit printed as VDD + 0.3 V 6
Operating Temperature Range, Extended (Y Version) -40 125 °C 6
Storage Temperature Range -65 150 °C 6
Junction Temperature 150 °C 6
Lead Temperature, Soldering 300 °C 10 sec 6
IR Reflow, Peak Temperature 235 °C <20 sec 6
Thermal Impedance θJA θJA 206 °C/W 8-Lead MSOP 6

CAD (KiCad official)

  • Symbol: AD5452YRMZ
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: ad5452yrmz-etched.step / ad5452yrmz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5452yrmz.step / ad5452yrmz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 6be2f2663e55e3c1, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF