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AD5447YRUZ-REEL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD5447YRUZ-REEL7
Analog Devices · Digital To Analog Converters (DAC) · TSSOP-24
AD5447YRUZ-REEL7 from Analog Devices, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | DAC analog ground pin; normally connected to the system analog ground but can be biased to allow single-supply operation. |
| 2 | IOUTA | output | DAC A current output pin. |
| 3 | RFBA | passive | DAC A feedback resistor pin, connected to the external amplifier output to establish the DAC voltage output. |
| 4 | VREFA | input | DAC A reference voltage input pin; the reference input range is ±10 V. |
| 5 | DGND | power_in | Digital ground pin. |
| 6 | DAC A/B | input | Selects DAC A when low and DAC B when high. |
| 7 | DB11 | bidirectional | Parallel data bit 11 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 8 | DB10 | bidirectional | Parallel data bit 10 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 9 | DB9 | bidirectional | Parallel data bit 9 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 10 | DB8 | bidirectional | Parallel data bit 8 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 11 | DB7 | bidirectional | Parallel data bit 7 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 12 | DB6 | bidirectional | Parallel data bit 6 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 13 | DB5 | bidirectional | Parallel data bit 5 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 14 | DB4 | bidirectional | Parallel data bit 4 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 15 | DB3 | bidirectional | Parallel data bit 3 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 16 | DB2 | bidirectional | Parallel data bit 2 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 17 | DB1 | bidirectional | Parallel data bit 1 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 18 | DB0 | bidirectional | Parallel data bit 0, the least significant bit (LSB), of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 19 | CS | input | Active-low chip select input; used with R/W to load parallel data into the input latch or to read data from the DAC register. |
| 20 | R/W | input | Read/write input; low with CS loads parallel data, and high with CS reads back the DAC register contents. |
| 21 | VDD | power_in | Positive power supply input; the device operates from a 2.5 V to 5.5 V supply. |
| 22 | VREFB | input | DAC B reference voltage input pin; the reference input range is ±10 V. |
| 23 | RFBB | passive | DAC B feedback resistor pin, connected to the external amplifier output to establish the DAC voltage output. |
| 24 | IOUTB | output | DAC B current output pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-24 |
| Category | Data Acquisition |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 相对精度 | -1 | 1 | LSB | 3 | |||
| 差分非线性 | -1 | 2 | LSB | 保证单调性 | 3 | ||
| 增益误差 | -25 | 25 | mV | 3 | |||
| 增益误差温度系数 | -5 | 5 | ppm FSR/°C | 3 | |||
| 输出漏电流 | -5 | 5 | nA | 数据 = 0x0000,TA = 25°C | 3 | ||
| 输出漏电流 | -15 | 15 | nA | 数据 = 0x0000 | 3 | ||
| 基准输入范围 | -10 | 10 | V | 3 | |||
| VREFA、VREFB输入电阻 | 8 | 10 | 13 | kΩ | 输入电阻TC = -50 ppm/°C | 3 | |
| 反馈电阻 R | R | 8 | 10 | 12 | kΩ | 16 | |
| VREFA至VREFB输入电阻不匹配 | 1.6 | 2.5 | % | 典型值 = 25°C,最大值 = 125°C | 3 | ||
| 输入高电压 | VIH | 1.7 | V | VDD = 3.6 V至5.5 V | 3 | ||
| 输入低电压 | VIL | 0.8 | V | VDD = 2.7 V至5.5 V | 3 | ||
| 输入低电压 | VIL | 0.7 | V | VDD = 2.5 V至2.7 V | 3 | ||
| 输出低电压 | VOL | 0.4 | V | VDD = 4.5 V至5.5 V, I SINK = 200 µA | 3 | ||
| 输入电容 | 4 | 10 | pF | 3 | |||
| 输出电容 | 12 | 17 | pF | DAC锁存加载全0 | 4 | ||
| 输出电容 | 25 | 30 | pF | DAC锁存加载全1 | 4 | ||
| 输出电压建立时间 (FS测量精度±1 mV) | 80 | 120 | ns | RLOAD = 100 Ω,CLOAD = 15 pF,VREF = 10 V,DAC锁存交替加载0和1 | 3 | ||
| 输出电压建立时间 (FS测量精度±4 mV) | 35 | 70 | ns | RLOAD = 100 Ω,CLOAD = 15 pF,VREF = 10 V,DAC锁存交替加载0和1 | 3 | ||
| 输出电压建立时间 (FS测量精度±16 mV) | 30 | 60 | ns | RLOAD = 100 Ω,CLOAD = 15 pF,VREF = 10 V,DAC锁存交替加载0和1 | 3 | ||
| 数字延迟 | 20 | 40 | ns | 接口延迟时间 | 3 | ||
| 10%至90%建立时间 | 15 | 30 | ns | 上升和下降时间,VREF = 10 V,RLOAD = 100 Ω | 3 | ||
| 电源电压范围 | VDD | 2.5 | 5.5 | V | 4 | ||
| 电源电流 IDD | IDD | 0.5 | 10 | µA | TA = −40°C至+125°C,逻辑输入 = 0 V或VDD | 4 | |
| VDD至GND | VDD | -0.3 | 7 | V | 6 | ||
| VREFA、VREFB、RFBA、RFBB至DGND | -12 | 12 | V | 6 | |||
| IOUT1、IOUT2至DGND | -0.3 | 7 | V | 6 | |||
| 工作温度范围 (汽车应用 Y级) | -40 | 125 | °C | 6 | |||
| 存储温度范围 | -65 | 150 | °C | 6 | |||
| 结温 | 150 | °C | 6 | ||||
| 24引脚 TSSOP θJA热阻 | θJA | 128 | °C/W | 24引脚 TSSOP | 6 | ||
| 引脚温度,焊接 | 300 | °C | 10秒 | 6 | |||
| IR回流焊峰值温度 | 235 | °C | 低于20秒 | 6 |
CAD (KiCad official)
- Symbol:
AD5447YRUZ-REEL7 - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
ad5447yruz-reel7-etched.step/ad5447yruz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5447yruz-reel7.step/ad5447yruz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (32 pp, sha256
edba9a6fc53a9b5c, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD5447YRUZ-REEL7
**Analog Devices** · Digital To Analog Converters (DAC) · TSSOP-24
AD5447YRUZ-REEL7 from Analog Devices, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | DAC analog ground pin; normally connected to the system analog ground but can be biased to allow single-supply operation. |
| 2 | IOUTA | output | DAC A current output pin. |
| 3 | RFBA | passive | DAC A feedback resistor pin, connected to the external amplifier output to establish the DAC voltage output. |
| 4 | VREFA | input | DAC A reference voltage input pin; the reference input range is ±10 V. |
| 5 | DGND | power_in | Digital ground pin. |
| 6 | DAC A/B | input | Selects DAC A when low and DAC B when high. |
| 7 | DB11 | bidirectional | Parallel data bit 11 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 8 | DB10 | bidirectional | Parallel data bit 10 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 9 | DB9 | bidirectional | Parallel data bit 9 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 10 | DB8 | bidirectional | Parallel data bit 8 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 11 | DB7 | bidirectional | Parallel data bit 7 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 12 | DB6 | bidirectional | Parallel data bit 6 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 13 | DB5 | bidirectional | Parallel data bit 5 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 14 | DB4 | bidirectional | Parallel data bit 4 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 15 | DB3 | bidirectional | Parallel data bit 3 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 16 | DB2 | bidirectional | Parallel data bit 2 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 17 | DB1 | bidirectional | Parallel data bit 1 of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 18 | DB0 | bidirectional | Parallel data bit 0, the least significant bit (LSB), of the 12-bit data word; the data bus is also used to read back DAC register contents. |
| 19 | CS | input | Active-low chip select input; used with R/W to load parallel data into the input latch or to read data from the DAC register. |
| 20 | R/W | input | Read/write input; low with CS loads parallel data, and high with CS reads back the DAC register contents. |
| 21 | VDD | power_in | Positive power supply input; the device operates from a 2.5 V to 5.5 V supply. |
| 22 | VREFB | input | DAC B reference voltage input pin; the reference input range is ±10 V. |
| 23 | RFBB | passive | DAC B feedback resistor pin, connected to the external amplifier output to establish the DAC voltage output. |
| 24 | IOUTB | output | DAC B current output pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-24 |
| Category | Data Acquisition |
| Pins | 24 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 相对精度 | | -1 | | 1 | LSB | | 3 |
| 差分非线性 | | -1 | | 2 | LSB | 保证单调性 | 3 |
| 增益误差 | | -25 | | 25 | mV | | 3 |
| 增益误差温度系数 | | -5 | | 5 | ppm FSR/°C | | 3 |
| 输出漏电流 | | -5 | | 5 | nA | 数据 = 0x0000,TA = 25°C | 3 |
| 输出漏电流 | | -15 | | 15 | nA | 数据 = 0x0000 | 3 |
| 基准输入范围 | | -10 | | 10 | V | | 3 |
| VREFA、VREFB输入电阻 | | 8 | 10 | 13 | kΩ | 输入电阻TC = -50 ppm/°C | 3 |
| 反馈电阻 R | R | 8 | 10 | 12 | kΩ | | 16 |
| VREFA至VREFB输入电阻不匹配 | | | 1.6 | 2.5 | % | 典型值 = 25°C,最大值 = 125°C | 3 |
| 输入高电压 | VIH | 1.7 | | | V | VDD = 3.6 V至5.5 V | 3 |
| 输入低电压 | VIL | | | 0.8 | V | VDD = 2.7 V至5.5 V | 3 |
| 输入低电压 | VIL | | | 0.7 | V | VDD = 2.5 V至2.7 V | 3 |
| 输出低电压 | VOL | | | 0.4 | V | VDD = 4.5 V至5.5 V, I SINK = 200 µA | 3 |
| 输入电容 | | | 4 | 10 | pF | | 3 |
| 输出电容 | | | 12 | 17 | pF | DAC锁存加载全0 | 4 |
| 输出电容 | | | 25 | 30 | pF | DAC锁存加载全1 | 4 |
| 输出电压建立时间 (FS测量精度±1 mV) | | | 80 | 120 | ns | RLOAD = 100 Ω,CLOAD = 15 pF,VREF = 10 V,DAC锁存交替加载0和1 | 3 |
| 输出电压建立时间 (FS测量精度±4 mV) | | | 35 | 70 | ns | RLOAD = 100 Ω,CLOAD = 15 pF,VREF = 10 V,DAC锁存交替加载0和1 | 3 |
| 输出电压建立时间 (FS测量精度±16 mV) | | | 30 | 60 | ns | RLOAD = 100 Ω,CLOAD = 15 pF,VREF = 10 V,DAC锁存交替加载0和1 | 3 |
| 数字延迟 | | | 20 | 40 | ns | 接口延迟时间 | 3 |
| 10%至90%建立时间 | | | 15 | 30 | ns | 上升和下降时间,VREF = 10 V,RLOAD = 100 Ω | 3 |
| 电源电压范围 | VDD | 2.5 | | 5.5 | V | | 4 |
| 电源电流 IDD | IDD | | 0.5 | 10 | µA | TA = −40°C至+125°C,逻辑输入 = 0 V或VDD | 4 |
| VDD至GND | VDD | -0.3 | | 7 | V | | 6 |
| VREFA、VREFB、RFBA、RFBB至DGND | | -12 | | 12 | V | | 6 |
| IOUT1、IOUT2至DGND | | -0.3 | | 7 | V | | 6 |
| 工作温度范围 (汽车应用 Y级) | | -40 | | 125 | °C | | 6 |
| 存储温度范围 | | -65 | | 150 | °C | | 6 |
| 结温 | | | | 150 | °C | | 6 |
| 24引脚 TSSOP θJA热阻 | θJA | | 128 | | °C/W | 24引脚 TSSOP | 6 |
| 引脚温度,焊接 | | | | 300 | °C | 10秒 | 6 |
| IR回流焊峰值温度 | | | | 235 | °C | 低于20秒 | 6 |
## CAD (KiCad official)
- Symbol: `AD5447YRUZ-REEL7`
- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`
- 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files: `ad5447yruz-reel7-etched.step` / `ad5447yruz-reel7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5447yruz-reel7.step` / `ad5447yruz-reel7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885036519337984) (32 pp, sha256 `edba9a6fc53a9b5c`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad5447yruz-reel7-datasheet.pdf)