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AD5343BRUZ
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Analog Devices Digital To Analog Converters (DACs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AD5343BRUZ
Analog Devices · Digital To Analog Converters (DACs) · TSSOP-20
AD5343BRUZ from Analog Devices, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HBEN | input | This pin is used when writing to the device to determine if data is written to the high byte register or the low byte register. |
| 2 | VREF | power_in | Unbuffered reference input for both DACs. |
| 3 | VOUTA | output | Output of DAC A, buffered with rail-to-rail operation. |
| 4 | VOUTB | output | Output of DAC B, buffered with rail-to-rail operation. |
| 5 | GND | power_in | Ground reference point for all circuitry on the part. |
| 6 | CS | input | Active low Chip Select Input, used in conjunction with WR to write data to the parallel interface. |
| 7 | WR | input | Active low Write Input, used in conjunction with CS to write data to the parallel interface. |
| 8 | A0 | input | Address pin for selecting between DAC A and DAC B. |
| 9 | CLR | input | Asynchronous active low control input that clears all input registers and DAC registers to zeros. |
| 10 | LDAC | input | Active low control input that updates the DAC registers with the contents of the input registers, allowing all DAC outputs to be simultaneously updated. |
| 11 | PD | input | Power-Down Pin: this active low control pin puts all DACs into power-down mode. |
| 12 | VDD | power_in | Power supply pin; the part operates from 2.5 V to 5.5 V and the supply should be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND. |
| 13 | DB0 | input | Parallel data input, bit 0 of the eight parallel data inputs (DB7 is the MSB). |
| 14 | DB1 | input | Parallel data input, bit 1 of the eight parallel data inputs (DB7 is the MSB). |
| 15 | DB2 | input | Parallel data input, bit 2 of the eight parallel data inputs (DB7 is the MSB). |
| 16 | DB3 | input | Parallel data input, bit 3 of the eight parallel data inputs (DB7 is the MSB). |
| 17 | DB4 | input | Parallel data input, bit 4 of the eight parallel data inputs (DB7 is the MSB). |
| 18 | DB5 | input | Parallel data input, bit 5 of the eight parallel data inputs (DB7 is the MSB). |
| 19 | DB6 | input | Parallel data input, bit 6 of the eight parallel data inputs (DB7 is the MSB). |
| 20 | DB7 | input | Parallel data input, DB7 is the MSB of the eight parallel data inputs. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-20 |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
AD5343BRUZ - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
ad5343bruz-etched.step/ad5343bruz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5343bruz.step/ad5343bruz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
1d0f4be015bcde77, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AD5343BRUZ
**Analog Devices** · Digital To Analog Converters (DACs) · TSSOP-20
AD5343BRUZ from Analog Devices, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HBEN | input | This pin is used when writing to the device to determine if data is written to the high byte register or the low byte register. |
| 2 | VREF | power_in | Unbuffered reference input for both DACs. |
| 3 | VOUTA | output | Output of DAC A, buffered with rail-to-rail operation. |
| 4 | VOUTB | output | Output of DAC B, buffered with rail-to-rail operation. |
| 5 | GND | power_in | Ground reference point for all circuitry on the part. |
| 6 | CS | input | Active low Chip Select Input, used in conjunction with WR to write data to the parallel interface. |
| 7 | WR | input | Active low Write Input, used in conjunction with CS to write data to the parallel interface. |
| 8 | A0 | input | Address pin for selecting between DAC A and DAC B. |
| 9 | CLR | input | Asynchronous active low control input that clears all input registers and DAC registers to zeros. |
| 10 | LDAC | input | Active low control input that updates the DAC registers with the contents of the input registers, allowing all DAC outputs to be simultaneously updated. |
| 11 | PD | input | Power-Down Pin: this active low control pin puts all DACs into power-down mode. |
| 12 | VDD | power_in | Power supply pin; the part operates from 2.5 V to 5.5 V and the supply should be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND. |
| 13 | DB0 | input | Parallel data input, bit 0 of the eight parallel data inputs (DB7 is the MSB). |
| 14 | DB1 | input | Parallel data input, bit 1 of the eight parallel data inputs (DB7 is the MSB). |
| 15 | DB2 | input | Parallel data input, bit 2 of the eight parallel data inputs (DB7 is the MSB). |
| 16 | DB3 | input | Parallel data input, bit 3 of the eight parallel data inputs (DB7 is the MSB). |
| 17 | DB4 | input | Parallel data input, bit 4 of the eight parallel data inputs (DB7 is the MSB). |
| 18 | DB5 | input | Parallel data input, bit 5 of the eight parallel data inputs (DB7 is the MSB). |
| 19 | DB6 | input | Parallel data input, bit 6 of the eight parallel data inputs (DB7 is the MSB). |
| 20 | DB7 | input | Parallel data input, DB7 is the MSB of the eight parallel data inputs. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-20 |
| Category | ADC/DAC/Data Conversion |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `AD5343BRUZ`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `ad5343bruz-etched.step` / `ad5343bruz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5343bruz.step` / `ad5343bruz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5332_5333_5342_5343.pdf) (20 pp, sha256 `1d0f4be015bcde77`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ad5343bruz-datasheet.pdf)