component
AD5331BRUZ
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"number": "1",
"name": "DB8",
"type": "input",
"description": "Parallel data input; DB9 is the most significant bit of the parallel data, so DB8 is the bit immediately below it."
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{
"number": "2",
"name": "DB9",
"type": "input",
"description": "Most significant bit of the parallel data input."
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{
"number": "3",
"name": "VREF",
"type": "power_in",
"description": "Unbuffered reference input for the DAC."
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{
"number": "4",
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"description": "Output of the DAC, buffered with rail-to-rail operation."
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{
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{
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{
"number": "7",
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"description": "Active low write input, used in conjunction with CS to write data to the parallel interface; data is loaded into the input registers on the rising edge of WR."
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{
"number": "8",
"name": "GAIN",
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"description": "Gain control pin that sets the output range to 0 V to VREF or 0 V to 2 × VREF."
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{
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{
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{
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"name": "Minimum Output Voltage",
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"name": "Input Current",
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"name": "Input Low Voltage",
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{
"name": "Input Low Voltage",
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"typ": null,
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{
"name": "Input Low Voltage",
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{
"name": "Input High Voltage",
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{
"name": "Input High Voltage",
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{
"name": "Input High Voltage",
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{
"name": "Supply Voltage",
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{
"name": "IDD (Normal Mode)",
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{
"name": "IDD (Normal Mode)",
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"conditions": "VDD = 2.5 V to 3.6 V; DACs active, excluding load currents; unbuffered reference, VIH = VDD, VIL = GND",
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{
"name": "IDD (Power-Down Mode)",
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{
"name": "IDD (Power-Down Mode)",
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{
"name": "Output Voltage Settling Time (AD5331)",
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"conditions": "VREF = 2 V; ¼ scale to ¾ scale change (0x100 to 0x300)",
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{
"name": "CS to WR setup time",
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"name": "CS to WR hold time",
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"name": "WR pulse width",
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{
"name": "Data, GAIN, BUF, HBEN setup time",
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{
"name": "Data, GAIN, BUF, HBEN hold time",
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"conditions": "Data, GAIN, BUF, HBEN hold time",
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{
"name": "WR falling to LDAC falling (synchronous mode)",
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"conditions": "Synchronous mode; WR falling to LDAC falling",
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{
"name": "LDAC falling to WR rising (synchronous mode)",
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"name": "WR rising to LDAC rising (synchronous mode)",
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"name": "LDAC rising to WR rising (asynchronous mode)",
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"name": "WR rising to LDAC falling (asynchronous mode)",
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"name": "LDAC pulse width",
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"name": "CLR pulse width",
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"name": "Time between WR cycles",
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"name": "VDD to GND",
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{
"name": "VOUT to GND",
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{
"name": "Operating Temperature Range (Industrial, B Version)",
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