component
AD5318ARUZ-REEL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "AD5318ARUZ-REEL7",
"manufacturer": "Analog Devices",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Data Acquisition",
"subcategory": "Digital To Analog Converters (DAC)",
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"lbr": "ad5318aruz-reel7.lbr"
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"distributor_links": {
"lcsc": "C515875",
"digikey": "AD5318ARUZ-REEL7TR-ND",
"mouser": "584-AD5318ARUZ-R7"
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"pins": [
{
"number": "1",
"name": "LDAC",
"type": "input",
"description": "This active low control input transfers the contents of the input registers to their respective DAC registers, and it may alternatively be tied permanently low."
},
{
"number": "2",
"name": "SYNC",
"type": "input",
"description": "Active low frame synchronization input: data is clocked in on the falling edges of the following 16 clocks, and a rising edge of SYNC before the 16th falling edge causes the write sequence to be ignored."
},
{
"number": "3",
"name": "VDD",
"type": "power_in",
"description": "Power supply input that can be operated from 2.5 V to 5.5 V and should be decoupled with a 10 μF capacitor in parallel with a 0.1 μF capacitor to GND."
},
{
"number": "4",
"name": "VOUTA",
"type": "output",
"description": "Buffered analog output voltage from DAC A, with an output amplifier that has rail-to-rail operation."
},
{
"number": "5",
"name": "VOUTB",
"type": "output",
"description": "Buffered analog output voltage from DAC B, with an output amplifier that has rail-to-rail operation."
},
{
"number": "6",
"name": "VOUTC",
"type": "output",
"description": "Buffered analog output voltage from DAC C, with an output amplifier that has rail-to-rail operation."
},
{
"number": "7",
"name": "VOUTD",
"type": "output",
"description": "Buffered analog output voltage from DAC D, with an output amplifier that has rail-to-rail operation."
},
{
"number": "8",
"name": "VREFABCD",
"type": "input",
"description": "Reference input for DACs A, B, C and D, with an input range of 0.25 V to VDD in unbuffered mode and 1 V to VDD in buffered mode."
},
{
"number": "9",
"name": "VREFEFGH",
"type": "input",
"description": "Reference input for DACs E, F, G and H, with an input range of 0.25 V to VDD in unbuffered mode and 1 V to VDD in buffered mode."
},
{
"number": "10",
"name": "VOUTE",
"type": "output",
"description": "Buffered analog output voltage from DAC E, with an output amplifier that has rail-to-rail operation."
},
{
"number": "11",
"name": "VOUTF",
"type": "output",
"description": "Buffered analog output voltage from DAC F, with an output amplifier that has rail-to-rail operation."
},
{
"number": "12",
"name": "VOUTG",
"type": "output",
"description": "Buffered analog output voltage from DAC G, with an output amplifier that has rail-to-rail operation."
},
{
"number": "13",
"name": "VOUTH",
"type": "output",
"description": "Buffered analog output voltage from DAC H, with an output amplifier that has rail-to-rail operation."
},
{
"number": "14",
"name": "GND",
"type": "power_in",
"description": "Ground reference point for all circuitry on the part."
},
{
"number": "15",
"name": "DIN",
"type": "input",
"description": "Serial data input to a 16-bit shift register, clocked in on the falling edge of SCLK; the DIN input buffer is powered down after each write cycle."
},
{
"number": "16",
"name": "SCLK",
"type": "input",
"description": "Serial clock input, with data clocked into the input shift register on the falling edge at rates up to 30 MHz; the SCLK input buffer is powered down after each write cycle."
}
],
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"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
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"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
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"at": "2026-10-21T01:15:32"
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"pages": 28,
"sha256": "54d929c54190959e",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
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