# AD5290YRMZ10

**Analog Devices** · Digital Potentiometers · MSOP-10

AD5290YRMZ10 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | passive | Resistor Terminal A; VSS ≤ VA ≤ VDD. |
| 2 | B | passive | Resistor Terminal B; VSS ≤ VB ≤ VDD. |
| 3 | VSS | power_in | Negative supply; connect to 0 V for single-supply applications. |
| 4 | GND | power_in | Digital ground reference; to minimize digital ground bounce it should be joined remotely to the analog ground. |
| 5 | CS | input | Active-low chip select; when CS returns high, data is loaded into the wiper register. |
| 6 | CLK | input | Serial clock input, positive-edge triggered; requires clean transitions to avoid clocking incorrect data. |
| 7 | SDI | input | Serial data input that shifts in one bit per positive CLK edge, MSB loaded first. |
| 8 | SDO | output | Serial data output with internal open-drain N-channel FET that requires an external pull-up resistor; it shifts out the previous eight SDI bits for daisy-chaining. |
| 9 | VDD | power_in | Positive power supply; single-supply operation is specified from +20 V to +30 V and dual-supply from ±10 V to ±15 V. |
| 10 | W | passive | Wiper Terminal W; VSS ≤ VW ≤ VDD. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Data Acquisition |
| Pins | 10 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistor Differential Nonlinearity (rheostat mode) | R-DNL | -1 | 0.3 | 1 | LSB | RWB, VA = NC | 3 |
| Resistor Nonlinearity (rheostat mode) | R-INL | -1.5 | 0.7 | 1.5 | LSB | RWB, VA = NC | 3 |
| Nominal Resistor Tolerance | ΔRAB | -30 |  | 30 | % | TA = +25°C | 3 |
| Wiper Resistance | RW |  | 50 | 100 | Ω |  | 3 |
| Integral Nonlinearity (potentiometer divider mode) | INL | -1 | 0.3 | 1 | LSB |  | 3 |
| Differential Nonlinearity (potentiometer divider mode) | DNL | -1 | 0.3 | 1 | LSB |  | 3 |
| Full-Scale Error | VWFSE | -6 | -4 | 0 | LSB | Code = 0xFF | 3 |
| Zero-Scale Error | VWZSE | 0 | 3 | 5 | LSB | Code = 0x00 | 3 |
| Common-Mode Leakage | ICM |  |  | 1 | nA | VA = VB = VW | 3 |
| Input Logic High (CS, CLK, SDI) | VIH | 2.4 |  |  | V |  | 3 |
| Input Logic Low (CS, CLK, SDI) | VIL |  |  | 0.8 | V |  | 3 |
| Output Logic High (SDO) | VOH | 4.9 |  |  | V | RPull-up = 2.2 kΩ to 5 V | 3 |
| Output Logic Low (SDO) | VOL |  |  | 0.4 | V | IOL = 1.6 mA | 3 |
| Input Current | IIL | -1 |  | 1 | µA | VIN = 0 V or 5 V | 3 |
| Positive Supply Current | IDD |  | 15 | 50 | µA | VIH = +5 V or VIL = 0 V, VDD/VSS = ±15 V | 3 |
| Negative Supply Current | ISS | -1 | -0.01 |  | µA | VIH = +5 V or VIL = 0 V, VDD/VSS = ±15 V | 3 |
| Power Supply Rejection Ratio | PSRR | -0.15 | 0.08 | 0.15 | %/% | ΔVDD/ΔVSS = ±15 V ± 10% | 3 |
| CLK Frequency (serial interface) | fCLK |  |  | 4 | MHz |  | 7 |
| Input Clock Pulse Width | tCH, tCL | 120 |  |  | ns | Clock level high or low | 7 |
| Data Setup Time | tDS | 30 |  |  | ns |  | 7 |
| Data Hold Time | tDH | 20 |  |  | ns |  | 7 |
| CLK to SDO Propagation Delay | tPD | 10 |  | 100 | ns | RPull-up = 2.2 kΩ, CL < 20 pF | 7 |
| CS Setup Time | tCSS | 120 |  |  | ns |  | 7 |
| CS High Pulse Width | tCSW | 150 |  |  | ns |  | 7 |
| CLK Fall to CS Fall Hold Time | tCSH0 | 10 |  |  | ns |  | 7 |
| CLK Rise to CS Rise Hold Time | tCSH | 120 |  |  | ns |  | 7 |
| CS Rise to Clock Rise Setup | tCS1 | 120 |  |  | ns |  | 7 |
| VDD to GND |  | -0.3 |  | 35 | V |  | 9 |
| VSS to GND |  | -16.5 |  | 0.3 | V |  | 9 |
| VDD to VSS |  | -0.3 |  | 35 | V |  | 9 |
| Maximum Current, pulsed IWB, IWA | IWB, IWA | -20 |  | 20 | mA | Pulsed | 9 |
| Maximum Continuous Current IWB | IWB | -5 |  | 5 | mA | RWB ≤ 6 kΩ, A open, VDD/VSS = 30 V/0 V | 9 |
| Maximum Continuous Current IWA | IWA | -5 |  | 5 | mA | RWA ≤ 6 kΩ, B open, VDD/VSS = 30 V/0 V | 9 |
| Digital Input and Output Voltages to GND |  | 0 |  | 7 | V |  | 9 |
| Operating Temperature Range |  | -40 |  | 125 | °C |  | 9 |
| Maximum Junction Temperature | TJMAX |  |  | 150 | °C |  | 9 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 9 |
| Lead Temperature (Soldering) |  |  |  | 245 | °C | Soldering, 10 sec to 30 sec | 9 |
| Single-Supply Operating Range (VDD) |  | 4.5 |  | 33 | V | Single supply, VSS at 0 V | 17 |
| Dual-Supply Operating Range (VDD/VSS) |  | 4.5 |  | 16.5 | V | Dual supply ±4.5 V to ±16.5 V | 17 |
| Resistance Temperature Coefficient | (∆RAB/RAB)/∆T×106 |  | 35 |  | ppm/°C | VAB = VDD, wiper = no connect | 3 |
| Voltage Divider Temperature Coefficient | (∆VW/VW)/∆T×106 |  | 5 |  | ppm/°C | Code = 0x80 | 3 |
| Thermal Resistance, junction-to-ambient | θJA |  | 230 |  | °C/W | MSOP-10 package | 9 |

## CAD (KiCad official)

- Symbol: `AD5290YRMZ10`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `ad5290yrmz10-etched.step` / `ad5290yrmz10-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ad5290yrmz10.step` / `ad5290yrmz10.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884728460292096) (20 pp, sha256 `3b27c875d1daf308`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ad5290yrmz10-datasheet.pdf)