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AD5274BRMZ-20

Analog Devices · Pre-ordered Chips · MSOP-10

AD5274BRMZ-20 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive power supply, to be decoupled with 0.1 µF ceramic and 10 µF capacitors.
2 A passive Terminal A of the RDAC, with VSS ≤ VA ≤ VDD.
3 W passive Wiper terminal of the RDAC, with VSS ≤ VW ≤ VDD.
4 VSS power_in Negative supply, connected to 0 V for single-supply applications and decoupled with 0.1 µF ceramic and 10 µF capacitors.
5 EXT_CAP passive External capacitor pin, requiring a 1 µF capacitor between EXT_CAP and VSS with a voltage rating of ≥7 V.
6 GND power_in Ground pin, serving as the logic ground reference.
7 RESET input Active-low hardware reset that refreshes the RDAC register from the 50-TP memory; factory default is midscale until the first 50-TP wiper location is programmed, and it should be tied to VDD if not used.
8 SDA bidirectional Bidirectional open-drain serial data line, used with SCL to clock data into or out of the 16-bit input registers, and to be pulled to the supply with an external pull-up resistor.
9 SCL input Serial clock line, used with SDA to clock data into or out of the 16-bit input registers.
10 ADDR input Tristate address input that sets the two least significant bits (A1, A0) of the 7-bit target address.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-10
Category Interface ICs
Pins 10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Resistor integral nonlinearity R-INL -1 1 LSB 5
Resistor differential nonlinearity R-DNL -1 1 LSB 5
Nominal resistor tolerance, R-Perf mode -1 0.5 1 % See Table 5 and Table 6 5
Nominal resistor tolerance, Normal mode -15 15 % Normal mode 5
Wiper resistance 35 70 Ω Code = zero scale 5
Common-mode leakage current 50 nA VA = VW 5
Input logic high VINH 2 V 5
Input logic low VINL 0.8 V 5
Input current IIN -1 1 µA 5
Output voltage low, single supply VOL 0.4 V RPULL_UP = 2.2 kΩ to VDD; VDD = 2.7 V to 5.5 V, VSS = 0 V 5
Output voltage low, dual supply VOL 0.6 V RPULL_UP = 2.2 kΩ to VDD; VDD = 2.5 V to 2.75 V, VSS = −2.5 V to −2.75 V 5
Tristate leakage current -1 1 µA 5
Single-supply power range VDD 2.7 5.5 V VSS = 0 V 5
Dual-supply power range VDD/VSS 2.5 2.75 V 5
Supply current, positive IDD 1 µA 5
Supply current, negative ISS -1 µA 5
OTP store current, positive IDD_OTP_STORE 4 mA 5
OTP store current, negative ISS_OTP_STORE -4 mA 5
OTP read current, positive IDD_OTP_READ 500 µA 5
OTP read current, negative ISS_OTP_READ -500 µA 5
Power dissipation 5.5 µW VIH = VDD or VIL = GND 5
Power supply rejection ratio, RAW = 20 kΩ PSRR -66 -55 dB RAW = 20 kΩ; ΔVDD/ΔVSS = ±5 V ± 10% 5
VDD to GND VDD -0.3 7 V 9
VSS to GND VSS -7 0.3 V 9
VDD to VSS 7 V 9
EXT_CAP to VSS 7 V 9
Continuous terminal current IA, IW IA, IW -3 3 mA Continuous, RAW = 20 kΩ 9
Operating temperature range TA -40 125 °C 9
Maximum junction temperature TJ 150 °C 9
Storage temperature range -65 150 °C 9
Reflow peak temperature 260 °C Reflow soldering 9
SCL serial clock frequency fSCL 100 kHz Standard mode 6
SCL serial clock frequency fSCL 400 kHz Fast mode 6
tHIGH, SCL high time t1 4 µs Standard mode 6
tHIGH, SCL high time t1 0.6 µs Fast mode 7
tLOW, SCL low time t2 4.7 µs Standard mode 7
tLOW, SCL low time t2 1.3 µs Fast mode 7
tSU;DAT, data setup time t3 250 ns Standard mode 7
tSU;DAT, data setup time t3 100 ns Fast mode 7
tHD;DAT, data hold time t4 0 3.45 µs Standard mode 7
tHD;DAT, data hold time t4 0 0.9 µs Fast mode 7
tSU;STA, set-up time for repeated start condition t5 4.7 µs Standard mode 7
tSU;STA, set-up time for repeated start condition t5 0.6 µs Fast mode 7
tHD;STA, hold time (repeated) start condition t6 4 µs Standard mode 7
tHD;STA, hold time (repeated) start condition t6 0.6 µs Fast mode 7
tBUF, bus free time between stop and start t7 4.7 µs Standard mode 7
tBUF, bus free time between stop and start t7 1.3 µs Fast mode 7
tSU;STO, setup time for stop condition t8 4 µs Standard mode 7
tSU;STO, setup time for stop condition t8 0.6 µs Fast mode 7
tRDA, rise time of SDA signal t9 1000 ns Standard mode 7
tRDA, rise time of SDA signal t9 300 ns Fast mode 7
tFDA, fall time of SDA signal t10 300 ns Standard mode 7
RESET pulse time, minimum low time t13 20 ns Minimum RESET low time 7
Thermal resistance, junction to ambient, 10-lead MSOP θJA 161.8 °C/W 10-Lead MSOP 9
Thermal resistance, junction to board, 10-lead MSOP θJB 25.2 °C/W 10-Lead MSOP 9
Resistance temperature coefficient (rheostat mode) 5 ppm/°C Code = full scale 5
Nominal resistance RAW (20 kΩ option) RAW 20 kΩ 1

CAD (KiCad official)

  • Symbol: AD5274BRMZ-20
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)
  • 3D model files: ad5274brmz-20-etched.step / ad5274brmz-20-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad5274brmz-20.step / ad5274brmz-20.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (27 pp, sha256 ca45925ed0878864, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF