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AD5272BRMZ-50
Public Made by Adomby adom
Analog Devices Digital Potentiometers, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD5272BRMZ-50
Analog Devices · Digital Potentiometers · MSOP-10
AD5272BRMZ-50 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive power supply, 2.7 V to 5.5 V single-supply operation, decoupled with 0.1 µF ceramic and 10 µF capacitors. |
| 2 | A | passive | Terminal A of the RDAC, with VSS ≤ VA ≤ VDD. |
| 3 | W | passive | Wiper terminal of the RDAC, with VSS ≤ VW ≤ VDD. |
| 4 | VSS | power_in | Negative supply, connected to 0 V for single-supply applications, decoupled with 0.1 µF ceramic and 10 µF capacitors. |
| 5 | EXT_CAP | passive | External capacitor pin; connect a 1 µF capacitor between EXT_CAP and VSS with a voltage rating of ≥7 V. |
| 6 | GND | power_in | Ground pin, the logic ground reference. |
| 7 | RESET | input | Active-low hardware reset that refreshes the RDAC register with the 50-TP memory contents; tie to VDD if not used. |
| 8 | SDA | bidirectional | Bidirectional open-drain serial data line that must be pulled to the supply with an external pull-up resistor. |
| 9 | SCL | input | Serial clock line used with SDA to clock data into or out of the 16-bit input registers. |
| 10 | ADDR | input | Tristate address input that sets the two least significant bits (A1, A0) of the 7-bit target address. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | Data Converters |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal resistance | RAW | 50 | kΩ | AD5272 50 kΩ variant (features list 50 kΩ nominal) | 1 | ||
| Resistor integral nonlinearity | R-INL | -1 | 1 | LSB | RAW = 50 kΩ, 100 kΩ | 3 | |
| Resistor differential nonlinearity | R-DNL | -1 | 1 | LSB | 3 | ||
| Nominal resistor tolerance, R-Perf mode | -1 | 0.5 | 1 | % | R-Perf mode; see Table 2 and Table 3 | 3 | |
| Nominal resistor tolerance, normal mode | -15 | 15 | % | Normal mode | 3 | ||
| Resistance temperature coefficient | 5 | ppm/°C | Code = full scale | 3 | |||
| Wiper resistance | RW | 35 | 70 | Ω | Code = zero scale | 3 | |
| Capacitance A | CA | 90 | pF | f = 1 MHz, measured to GND, code = half scale | 3 | ||
| Capacitance W | CW | 40 | pF | f = 1 MHz, measured to GND, code = half scale | 3 | ||
| Input logic high | VINH | 2 | V | 3 | |||
| Input logic low | VINL | 0.8 | V | 3 | |||
| Input current | IIN | -1 | 1 | µA | 3 | ||
| Input capacitance | CIN | 5 | pF | 3 | |||
| Output voltage low | VOL | 0.4 | V | RPULL_UP = 2.2 kΩ to VDD; VDD = 2.7 V to 5.5 V, VSS = 0 V | 3 | ||
| Output voltage low | VOL | 0.6 | V | RPULL_UP = 2.2 kΩ to VDD; VDD = 2.5 V to 2.75 V, VSS = −2.5 V to −2.75 V | 3 | ||
| Tristate leakage current | -1 | 1 | µA | 3 | |||
| Output capacitance | 5 | pF | 3 | ||||
| Single-supply power range | VDD | 2.7 | 5.5 | V | VSS = 0 V | 3 | |
| Dual-supply power range | VDD/VSS | 2.5 | 2.75 | V | VSS = −2.5 V to −2.75 V (magnitude as printed ±2.5 V to ±2.75 V) | 3 | |
| Positive supply current | IDD | 1 | µA | 3 | |||
| Negative supply current | ISS | -1 | µA | 3 | |||
| 50-TP store current, positive | IDD_OTP_STORE | 4 | mA | 3 | |||
| 50-TP store current, negative | ISS_OTP_STORE | -4 | mA | 3 | |||
| 50-TP read current, positive | IDD_OTP_READ | 500 | µA | 3 | |||
| 50-TP read current, negative | ISS_OTP_READ | -500 | µA | 3 | |||
| Power dissipation | PDISS | 5.5 | µW | VIH = VDD or VIL = GND | 3 | ||
| Bandwidth −3 dB | BW | 120 | kHz | RAW = 50 kΩ, Terminal W | 4 | ||
| Total harmonic distortion | THD | -88 | dB | VA = 1 V rms, f = 1 kHz, code = half scale; RAW = 50 kΩ | 4 | ||
| Resistor noise density | 25 | nV/√Hz | RAW = 50 kΩ, code = half scale, TA = 25°C, f = 10 kHz | 4 | |||
| Serial clock frequency, standard mode | fSCL | 100 | kHz | Standard mode | 6 | ||
| Serial clock frequency, fast mode | fSCL | 400 | kHz | Fast mode | 6 | ||
| SCL high time, standard mode | t1 | 4 | µs | Standard mode | 6 | ||
| SCL high time, fast mode | t1 | 0.6 | µs | Fast mode | 6 | ||
| Data setup time, standard mode | t3 | 250 | ns | Standard mode | 6 | ||
| Data setup time, fast mode | t3 | 100 | ns | Fast mode | 6 | ||
| SDA rise time, standard mode | t9 | 1000 | ns | Standard mode | 6 | ||
| SDA rise time, fast mode | t9 | 300 | ns | Fast mode | 6 | ||
| RESET minimum low time | t13 | 20 | ns | RESET pulse time | 6 | ||
| Command execute time | tEXEC | 500 | ns | 6 | |||
| RDAC register write execute time, R-Perf mode | tRDAC_R-PERF | 2 | µs | R-Perf mode | 6 | ||
| RDAC register write execute time, normal mode | tRDAC_NORMAL | 600 | ns | Normal mode | 6 | ||
| Memory program time | tMEMORY_PROGRAM | 350 | ms | 6 | |||
| Reset 50-TP restore time | tRESET | 600 | µs | 6 | |||
| Power-on 50-TP restore time | tPOWER-UP | 2 | ms | Maximum time after VDD − VSS equals 2.5 V | 6 | ||
| VDD to GND | VDD | -0.3 | 7 | V | 9 | ||
| VSS to GND | VSS | -7 | 0.3 | V | 9 | ||
| VDD to VSS | VDD-VSS | 7 | V | 9 | |||
| Digital input and output voltage to GND | -0.3 | V | Upper limit printed as VDD + 0.3 V | 9 | |||
| EXT_CAP to VSS | EXT_CAP | 7 | V | 9 | |||
| Continuous terminal current IA, IW | IA, IW | -2 | 2 | mA | Continuous, RAW = 50 kΩ, 100 kΩ | 9 | |
| Operating temperature range | TA | -40 | 125 | °C | Includes programming of 50-TP memory | 9 | |
| Maximum junction temperature | TJ | 150 | °C | 9 | |||
| Storage temperature range | TSTG | -65 | 150 | °C | 9 | ||
| Reflow soldering peak temperature | 260 | °C | Time at peak 20 s to 40 s | 9 | |||
| Junction-to-ambient thermal resistance, 10-lead MSOP | θJA | 161.8 | °C/W | JEDEC natural convection | 9 | ||
| Junction-to-board thermal resistance, 10-lead MSOP | θJB | 25.2 | °C/W | Measured 1 mm from package edge, JEDEC θJB environment | 9 |
CAD (KiCad official)
- Symbol:
AD5272BRMZ-50 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ad5272brmz-50-etched.step/ad5272brmz-50-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5272brmz-50.step/ad5272brmz-50.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (27 pp, sha256
ca45925ed0878864, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).