component
AD5272BRMZ-100
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Analog Devices Digital Potentiometers, MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD5272BRMZ-100
Analog Devices · Digital Potentiometers · MSOP-10
AD5272BRMZ-100 from Analog Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive power supply. Should be decoupled with a 0.1 µF ceramic capacitor and a 10 µF capacitor. Range 2.7 V to 5.5 V (single supply) or +2.5 V to +2.75 V (dual supply). |
| 2 | A | passive | RDAC A terminal. Terminal voltage must be between VSS ≤ VA ≤ VDD. Nominal end-to-end resistance to W is 100 kΩ. |
| 3 | W | passive | RDAC wiper terminal. Terminal voltage must be between VSS ≤ VW ≤ VDD. Wiper position is set via the I2C interface with 1024-step (10-bit) resolution. |
| 4 | VSS | power_in | Negative power supply. Connect to 0 V for single-supply operation, or to -2.5 V to -2.75 V for dual-supply operation. Should be decoupled with a 0.1 µF ceramic capacitor and a 10 µF capacitor. |
| 5 | EXT_CAP | passive | External capacitor pin. A 1 µF capacitor with voltage rating ≥7 V must be connected between EXT_CAP and VSS. Required for 50-TP programming charge-pump operation. |
| 6 | GND | power_in | Ground pin, logic ground reference. |
| 7 | RESET | input | Hardware reset input, active low. Refreshes the RDAC register with the contents of the 50-TP memory location. On power-up, defaults to midscale until the first 50-TP memory location is programmed. Tie to VDD if unused. |
| 8 | SDA | bidirectional | I2C serial data line. Bidirectional open-drain data line used with SCL to transfer the 16-bit input shift register. Requires an external pull-up resistor to VDD (e.g. 2.2 kΩ). |
| 9 | SCL | input | I2C serial clock input. Used with SDA to shift in/out the 16-bit input shift register. Supports standard-mode (100 kHz) and fast-mode (400 kHz). |
| 10 | ADDR | input | Tri-state address input. Sets the two LSBs (A1, A0) of the 7-bit I2C slave address (see Table 11). Enables up to three parts on the same I2C bus. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-10 |
| Category | ADC/DAC/Data Conversion |
| Pins | 10 |
Ordering variants
Same part, different packaging or reel option.
AD5272BRMZ-100AD5272BRMZ-100-RL7AD5272BRMZ-100BCPZ-100
CAD (KiCad official)
- Symbol:
AD5272BRMZ-100 - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
ad5272brmz-100-etched.step/ad5272brmz-100-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5272brmz-100.step/ad5272brmz-100.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (28 pp, sha256
e7d7afbbd3932e2d, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).